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US4443882A Expired / Lapsed US ⏱️ 0.0 years remaining

Single terminal negative capacitance generator for response time enhancement

Assignee: AT&T Inc
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Filing: 1981-12-22
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Granted: 1984-04-17
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Expires: 2001-12-22
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Abstract

Abstract The combination of an amplifier with a capacitor connected between an input and output terminal is coupled to a data bus to effectively reduce the effective capacitance on the bus and thus enhance the response time of information sent through the data bus.

Inventors

  • 👤 Robert M. Rolfe
  • 👤 Masakazu Shoji

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 14:37
CPC Classifications
H; H03; H03H; H03H11/00; H03H11/46; H03H11/48; H03H11/481

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 252 words
In combination: a data bus conductor; said data bus conductor having a capacitance associated therewith and having first and second terminals; first and second circuit means each having capacitance associated therewith and being coupled to the first and second terminals, respectively; the first circuit means comprising a transceiver or a transmitter or a receiver; the second circuit means comprising a transceiver or a transmitter or a receiver; one of the first or second circuit means comprising at least a transmitter and the other circuit means comprising at least a receiver; said transmitter having respective output MOS field effect switching devices; an amplifier having a first input terminal and having an output terminal; capacitance means having first and second terminals coupled to the input terminal and the output terminal of the amplifier, respectively; only the first input terminal of the amplifier being coupled to the data bus conductor; the gain of the amplifier and the value of the capacitor means being selected such that total load capacitance on the data bus conductor including at least the capacitances of both said circuit means, said bus conductor and the effective capacitance of said amplifier/capacitance means is less than would be the case if the amplifier and capacitive means were not coupled to the data bus conductor; and the gain of the amplifier is approximately two or greater, and the amplifier has a response time which is approximately two times or greater less than a desired response time of information transmitted through the data bus conductor.
Claim 2
Dependent Claim 252 words
In combination: a data bus conductor; said data bus conductor having a capacitance associated therewith and having first and second terminals; first and second circuit means each having capacitance associated therewith and being coupled to the first and second terminals, respectively; the first circuit means comprising a transceiver or a transmitter or a receiver; the second circuit means comprising a transceiver or a transmitter or a receiver; one of the first or second circuit means comprising at least a transmitter and the other circuit means comprising at least a receiver; said transmitter having respective output MOS field effect switching devices; an amplifier having a first input terminal and having an output terminal; capacitance means having first and second terminals coupled to the input terminal and the output terminal of the amplifier, respectively; only the first input terminal of the amplifier being coupled to the data bus conductor; the gain of the amplifier and the value of the capacitor means being selected such that total load capacitance on the data bus conductor including at least the capacitances of both said circuit means, said bus conductor and the effective capacitance of said amplifier/capacitance means is less than would be the case if the amplifier and capacitive means were not coupled to the data bus conductor; and the gain of the amplifier is approximately two or greater, and the amplifier has a response time which is approximately two times or greater less than a desired response time of information transmitted through the data bus conductor.
Claim 3
Dependent Claim 165 words
A digital system comprising: a digital transmitter having an MOS a field effect output transistor coupled to an output terminal thereof which has a capacitance associated therewith; a digital receiver having an input terminal which has a capacitance associated therewith; a data bus conductor having two ends and having a capacitance associated therewith and being coupled by one end to the output terminal of the transmitter and being coupled by the other end to the input terminal of the receiver; an amplifier having a first input terminal and having an output terminal; capacitor means having first and second terminals coupled to the input terminal and output terminal of the amplifier, respectively; only the first input terminal of the amplifier being coupled to the data bus conductor; the amplifier has a gain of approximately two or greater; and the amplifier has a response time which is approximately two times or greater less than a desired response time of information transmitted from the transmitter to the receiver.
Claim 4
Dependent Claim 165 words
A digital system comprising: a digital transmitter having an MOS a field effect output transistor coupled to an output terminal thereof which has a capacitance associated therewith; a digital receiver having an input terminal which has a capacitance associated therewith; a data bus conductor having two ends and having a capacitance associated therewith and being coupled by one end to the output terminal of the transmitter and being coupled by the other end to the input terminal of the receiver; an amplifier having a first input terminal and having an output terminal; capacitor means having first and second terminals coupled to the input terminal and output terminal of the amplifier, respectively; only the first input terminal of the amplifier being coupled to the data bus conductor; the amplifier has a gain of approximately two or greater; and the amplifier has a response time which is approximately two times or greater less than a desired response time of information transmitted from the transmitter to the receiver.

References Cited (Backward Citations)

US29080A Cited
USRE29080E Cited
US4158878A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1987-04-17 1987-10-17 1988-04-17 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1991-04-17 1991-10-17 1992-04-17 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1995-04-17 1995-10-17 1996-04-17 $7700.00 Window Closed / Lapsed

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