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USRE29080E Expired / Lapsed US ⏱️ 0.0 years remaining

Compensated transformer circuit utilizing negative capacitance simulating circuit

Assignee: Lorain Products Corp
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Filing: 1975-06-02
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Granted: 1976-12-14
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Expires: 1995-06-02
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Abstract

Abstract A circuit for reducing or eliminating the effect of the stray capacitance of the windings of a transformer on signals coupled through that transformer. Circuitry is provided for generating voltages and currents which simulate the presence of a negative capacitance and for coupling those voltages and currents to a transformer in cancelling relationships to the stray capacitance thereof. Circuitry is also provided for imposing an upper frequency limit beyond which capacitance cancellation will not occur. The upper frequency limit stabilizes the circuitry and allows signal transmission to be limited to a predetermined desired band of frequencies.

Inventors

  • 👤 Frederick J. Kiko

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 22:45
CPC Classifications
H; H01; H01F; H01F27/00; H01F27/42; H03; H03H; H03H11/00; H03H11/46; H03H11/48; H03H11/481

Claims Analysis

Total Claims: 1
Claim 1
Independent Claim 1117 words
What is claimed is: .[.1. A compensated transformer circuit comprising, in combination, a transformer including a primary and a secondary winding, capacitance simulating means for establishing voltages and currents which affect the circuitry to which said voltages and currents are applied as if a negative capacitance were connected to said circuitry, said negative capacitance having a magnitude substantially proportional to the stray capacitance of said transformer, and coupling means for coupling said capacitance simulating means to said transformer to substantially cancel the effect which said stray capacitance has on the voltages across and currents through said primary and secondary windings..]. .[.2. A compensated transformer circuit as set forth in claim 1 in which said coupling means comprises a tertiary winding in said transformer..]. .[.3. A compensated transformer circuit as set forth in claim 1 in which said coupling means includes means for connecting said capacitance simulating means across said primary winding..]. .[.4. A compensated transformer circuit as set forth in claim 1 in which said coupling means includes means for connecting said capacitance simulating means across said secondary winding..]. .[.5. A compensated transformer circuit as set forth in claim 1 including band-limiting means for placing an upper frequency limit on the band of frequencies within which said capacitance simulating means cancels said stray capacitance..]. .[.6. A compensated transformer circuit including, in combination, a transformer having a primary and a secondary winding, a capacitance simulating circuit comprising a plurality of terminals, an amplifier, a plurality of feedback elements and means for connecting said feedback elements to said amplifier to establish between said terminals an effective negative capacitance having a magnitude substantially proportional to the stray capacitance of said transformer, said compensated transformer circuit further including coupling means for coupling said terminals to said transformer to substantially cancel the effect which said stray capacitance has on the transformation of voltage and current in said transformer..]. .[.7. A compensated transformer circuit as set forth in claim 6 including band-limiting means for placing an upper frequency limit on the band of frequencies within which said capacitance simulating circuit cancels said stray capacitance..]. .[.8. A compensated transformer circuit as set forth in claim 6 in which said amplifier is an operational amplifier of the type which includes an inverting input, a non-inverting input and an output and in which said plurality of feedback elements includes a positive feedback impedance, a negative feedback impedance and an input feedback impedance..]. .[.9. A compensated transformer circuit as set forth in claim 8 wherein said input feedback impedance is connected to said inverting input..]. .[.10. A compensated transformer circuit as set forth in claim 8 wherein said input feedback impedance is connected to said noninverting input..]. .[.11. A compensated transformer circuit as set forth in claim 8 including band-limiting means for placing an upper frequency limit on the band of frequencies within which said capacitance simulating circuit cancels said stray capacitance..]. .[.12. A compensated transformer circuit as set forth in claim 8 wherein one of the feedback impedances comprises a reactance and wherein the remaining feedback impedances comprise resistors..]. .[.13. A compensated transformer circuit as set forth in claim 12 including band-limiting means for cancelling the effect of said reactance for frequencies beyond the band of frequencies within which the cancellation of stray capacitance is desirable..]. .[.14. A compensated transformer circuit as set forth in claim 8 wherein said negative feedback impedance comprises an inductor and wherein said positive and input feedback impedances comprise resistors..]. .[.15. A compensated transformer circuit as set forth in claim 8 wherein said input feedback impedance comprises a capacitor and wherein said positive and negative feedback impedances comprise resistors..]. .[.16. A compensated transformer circuit as set forth in claim 8 wherein said positive feedback impedance comprises a capacitor and wherein said negative and input feedback impedances comprise resistors..]. .[.17. A compensated transformer circuit as set forth in claim 8 wherein said positive feedback impedance comprises an inductor and wherein said input and negative feedback impedances comprise resistors..]. .[.18. A compensated transformer circuit as set forth in claim 8 wherein said negative feedback impedance comprises a capacitor and wherein said positive and input feedback impedances comprise resistors..]..Iadd. 19. A transformer circuit which provides an uninterrupted path for the flow of primary and secondary current and which compensates for the frequency dependent attenuation of transformer signals that is introduced by the stray capacitance of the windings of the transformer comprising, in combination, a magnetic core, primary, secondary, and tertiary windings disposed on said core, an impedance simulating network including feedback circuitry for establishing voltages and currents which affect the circuitry to which said voltages and currents are applied as if a negative capacitance were connected to said circuitry, said negative capacitance having a magnitude substantially proportional to the stray capacitance of said transformer, and coupling means for coupling said impedance simulating network to said tertiary winding to effectively cancel the stray capacitance of said transformer. .Iaddend..Iadd. 20. A transformer circuit as set forth in claim 19 including band-limiting means for placing an upper frequency limit on the band of frequencies within which said impedance simulating network cancels said stray capacitance. .Iaddend..Iadd. 21. A transformer circuit as set forth in claim 19 in which said impedance simulating network includes an operational amplifier having an inverting input, a non-inverting input and an output, a positive feedback impedance, a negative feedback impedance, and an input feedback impedance. .Iaddend..Iadd. 22. A transformer circuit as set forth in claim 21 wherein said input feedback impedance is connected to said inverting input. .Iaddend..Iadd. 23. A transformer circuit as set forth in claim 21 wherein said input feedback impedance is connected to said non-inverting input. .Iaddend..Iadd. 24. A transformer circuit as set forth in claim 21 wherein one of the feedback impedances comprises a reactance and wherein the remaining feedback impedances comprise resistors. .Iaddend..Iadd. 25. A transformer circuit as set forth in claim 21 wherein said negative feedback impedance comprises an inductor and wherein said positive and negative feedback impedances comprise resistors. .Iaddend..Iadd. 26. A transformer circuit as set forth in claim 21 wherein said input feedback impedance comprises a capacitor and wherein said positive and negative feedback impedances comprise resistors. .Iaddend. .Iadd. 27. A transformer circuit as set forth in claim 21 wherein said positive feedback impedance comprises a capacitor and wherein said negative and input feedback impedances comprise resistors. .Iaddend..Iadd. 28. A transformer circuit as set forth in claim 21 wherein said positive feedback impedance comprises an inductor and wherein said input and negative feedback impedances comprise resistors. .Iaddend..Iadd. 29. A transformer circuit as set forth in claim 21 wherein said negative feedback impedance comprises a capacitor and wherein said positive and input feedback impedances comprise resistors. .Iaddend.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1979-12-14 1980-06-14 1980-12-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1983-12-14 1984-06-14 1984-12-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1987-12-14 1988-06-14 1988-12-14 $7700.00 Window Closed / Lapsed

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