US4439835A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Apparatus for and method of generation of ripple carry signals in conjunction with logical adding circuitry
Assignee: Boeing North American Inc
•
Filing: 1981-07-14
•
Granted: 1984-03-27
•
Expires: 2001-07-14
Abstract
Abstract A logical AND and logical OR gate are utilized in conjunction with two signals forming bits to be added for ascertaining the value of generate and propagate signals. The generate signal is passed to the output whenever the carry input is a logic zero and the propagate signal is supplied to the output whenever the carry signal is a logic one. This simplification of the approach to generating ripple carry signals substantially reduces the number of transistor to a value of about one-half that utilized in the prior art.
Inventors
- 👤 David W. Best
- 👤 Jeffrey D. Russell
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 08:24
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/38; G06F7/48; G06F7/50; G06F7/501
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
177 words
Ripple carry signal generating apparatus comprising, in combination: first and second logic signal input means for providing first and second logic signals; first logical signal combining circuit means connected to said first and second input means for receiving said first and second logic signals therefrom and outputting a logical AND combination signal as a "generate" signal; second logical signal combining circuit means connected to said first and second input means for receiving said first and second logic signals therefrom and outputting a logical OR combination signal as a "propagate" signal; carry input signal means for supplying carry logic input control signals; carry output signal means for providing output signals indicative in logic level of the need to pass carry outputs to further stages of signal combination logic; and signal transmission means connected between said first and second logical signal combining circuit means and said carry output means and connected to said carry input signal means for selectively passing propagate and generate signals to said output means in response to control signals from said carry input signal means.
Claim 2
Dependent Claim
177 words
Ripple carry signal generating apparatus comprising, in combination: first and second logic signal input means for providing first and second logic signals; first logical signal combining circuit means connected to said first and second input means for receiving said first and second logic signals therefrom and outputting a logical AND combination signal as a "generate" signal; second logical signal combining circuit means connected to said first and second input means for receiving said first and second logic signals therefrom and outputting a logical OR combination signal as a "propagate" signal; carry input signal means for supplying carry logic input control signals; carry output signal means for providing output signals indicative in logic level of the need to pass carry outputs to further stages of signal combination logic; and signal transmission means connected between said first and second logical signal combining circuit means and said carry output means and connected to said carry input signal means for selectively passing propagate and generate signals to said output means in response to control signals from said carry input signal means.
Claim 3
Independent Claim
64 words
The method of generating a carry signal for use in a logical addition function comprising the steps of: logically ANDing and ORing two input signals to produce "generate" and "propagate" signals respectively; and outputting generate signals when received only when carry signals are of a logical zero value and outputting propagate signals only when the received carry signals are of a logical one value.
Claim 4
Independent Claim
64 words
The method of generating a carry signal for use in a logical addition function comprising the steps of: logically ANDing and ORing two input signals to produce "generate" and "propagate" signals respectively; and outputting generate signals when received only when carry signals are of a logical zero value and outputting propagate signals only when the received carry signals are of a logical one value.
Claim 5
Dependent Claim
208 words
Apparatus for generating a carry signal for use in a logical addition function comprising, in combination: first means for providing a logical AND output generate signal at an output thereof in response to logic signals supplied to first and second inputs thereof; second means for providing a logic OR output propagate signal in response to first and second signals supplied to first and second inputs thereof; third means, connected to said first and second means, for supplying first and second logical input signals to said first and second input means of each said first and second means; fourth means for providing apparatus output signals; fifth means for supplying control carry signals of first and second logic values; means, connected to said first, fourth and fifth means, for outputting said generate signal from said first means to said apparatus output means of said fourth means when received control carry signals from said fifth means are of a first logical value; and means, connected to said second, fourth and fifth means, for outputting said propagate signal from said second means to said apparatus output means of said fourth means in response to received control carry signals from said fifth means when said carry signals are of a second logic value.
Claim 6
Dependent Claim
208 words
Apparatus for generating a carry signal for use in a logical addition function comprising, in combination: first means for providing a logical AND output generate signal at an output thereof in response to logic signals supplied to first and second inputs thereof; second means for providing a logic OR output propagate signal in response to first and second signals supplied to first and second inputs thereof; third means, connected to said first and second means, for supplying first and second logical input signals to said first and second input means of each said first and second means; fourth means for providing apparatus output signals; fifth means for supplying control carry signals of first and second logic values; means, connected to said first, fourth and fifth means, for outputting said generate signal from said first means to said apparatus output means of said fourth means when received control carry signals from said fifth means are of a first logical value; and means, connected to said second, fourth and fifth means, for outputting said propagate signal from said second means to said apparatus output means of said fourth means in response to received control carry signals from said fifth means when said carry signals are of a second logic value.
References Cited (Backward Citations)
US3454751A
Cited
US3465133A
Cited
US3767906A
Cited
US3843876A
Cited
US3932734A
Cited
US3970833A
Cited
US4052604A
Cited
US4031379A
Cited
US4323982A
Cited
US4152775A
Cited
US4363107A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-03-27 | 1987-09-26 | 1988-03-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-03-27 | 1991-09-26 | 1992-03-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-03-27 | 1995-09-26 | 1996-03-27 | $7700.00 | Window Closed / Lapsed |