US4439786A — Apparatus and method for processing television pi…

Claim 1

Independent Claim 130 words

Information processing apparatus comprising digital memory means; writing means for writing information in digital form into said memory means at writing times depending on first timing signals; reading means for reading the information out of said memory means at reading times depending on second timing signals which drift in and out of phase with respect to the first timing signals; and delay means for delaying at least some of the writing times so that they do not coincide with the reading times, said delay means including comparator means for producing an output signal in accordance with the phase difference between the first and second timing signals, and a variable delay device for delaying the writing times by varying delay periods in accordance with the output signal from said comparator means.

Claim 2

Dependent Claim 130 words

Information processing apparatus comprising digital memory means; writing means for writing information in digital form into said memory means at writing times depending on first timing signals; reading means for reading the information out of said memory means at reading times depending on second timing signals which drift in and out of phase with respect to the first timing signals; and delay means for delaying at least some of the writing times so that they do not coincide with the reading times, said delay means including comparator means for producing an output signal in accordance with the phase difference between the first and second timing signals, and a variable delay device for delaying the writing times by varying delay periods in accordance with the output signal from said comparator means.

Claim 3

Dependent Claim 43 words

An apparatus according to claim 1 wherein said delay means is connected to receive said first and second timing signals, and wherein said delay means delays said writing times by varying amounts whereby each writing time is positioned approximately midway between reading times.

Claim 4

Dependent Claim 46 words

An apparatus according to claim 2 wherein said delay means includes counting means arranged to count during a period between a first timing signal and a second timing signal, the delay produced by said delay means being related to the count accumulated by said counting means.

Claim 5

Dependent Claim 141 words

Information processing apparatus comprising memory means; writing means for writing information into said memory means at times depending on first timing signals; reading means for reading the information out of said memory means at times depending on second timing signals which drift in and out of phase with the first timing signals; and delay means connected to receive said first and second timing signals for delaying at least some of the writing times so that they do not coincide with the reading times, said writing times being delayed by varying amounts whereby each writing time is positioned approximately midway between reading times, said delay means including counting means arranged to count during a period between a first timing signal and a second timing signal, the delay produced by said delay means being selected to the count accumulated by said counting means.

Claim 6

Dependent Claim 141 words

Information processing apparatus comprising memory means; writing means for writing information into said memory means at times depending on first timing signals; reading means for reading the information out of said memory means at times depending on second timing signals which drift in and out of phase with the first timing signals; and delay means connected to receive said first and second timing signals for delaying at least some of the writing times so that they do not coincide with the reading times, said writing times being delayed by varying amounts whereby each writing time is positioned approximately midway between reading times, said delay means including counting means arranged to count during a period between a first timing signal and a second timing signal, the delay produced by said delay means being selected to the count accumulated by said counting means.

Claim 7

Dependent Claim 30 words

An apparatus according to claim 1, 2, 3 or 4 for processing video signals including means for generating the said first timing signals from said video signals to be processed.

Claim 8

Dependent Claim 32 words

An apparatus according to claim 5 wherein said delay means is arranged so that the delay produced by it is reset by line synchronizing pulses of said video signals to be processed.

Claim 9

Dependent Claim 65 words

An apparatus according to claim 5 including a fixed delay circuit for further delaying the writing times when they occur during a period after a blanking period of the processed video signal and before the next blanking period of the signal to be processed; this further delay being such that the writing and reading times do not coincide with each other during said first-mentioned period.

Claim 10

Dependent Claim 45 words

An apparatus according to claim 5 including an analog-to-digital converter arranged to convert the video signals into digital form, said memory means being converted to receive the digital output of said converter and the output of said memory means being connected to a digital-to-analog converter.

Claim 11

Dependent Claim 55 words

An apparatus according to claim 8 wherein said delay means is arranged to delay by equal amounts (a) the times when digital codes produced by said analog-to-digital converter are fed to said memory means, and (b) said first timing signals which dictate the times at which the digital codes are written into said memory means.

Claim 12

Independent Claim 102 words

A method of processing video signal information comprising the steps of writing said video information into memory means at writing times dependent on first timing signals derived from said video signal information; reading the information out of said memory means at reading times dependent on second timing signals which drift in and out of phase with respect to said first timing signals; and delaying at least some of said writing times so that they do not coincide with said reading times, said writing times being delayed by a period which is reset by line synchronizing pulses of said video signals being processed.

Claim 13

Independent Claim 102 words

A method of processing video signal information comprising the steps of writing said video information into memory means at writing times dependent on first timing signals derived from said video signal information; reading the information out of said memory means at reading times dependent on second timing signals which drift in and out of phase with respect to said first timing signals; and delaying at least some of said writing times so that they do not coincide with said reading times, said writing times being delayed by a period which is reset by line synchronizing pulses of said video signals being processed.

Claim 14

Independent Claim 112 words

A method of processing information comprising the steps of writing information in digital form into a memory at writing times dependent on first timing signals; reading the information out of said memory at reading times dependent on second timing signals which drift in and out of phase with respect to said first timing signals; comparing the phases of said first and second timing signals; and delaying at least some of said writing times so that they do not coincide with said reading times, said writing times being delayed by varying delay periods in accordance with the difference obtained from said comparison step between the phases of said first and second timing signals.

Claim 15

Independent Claim 112 words

A method of processing information comprising the steps of writing information in digital form into a memory at writing times dependent on first timing signals; reading the information out of said memory at reading times dependent on second timing signals which drift in and out of phase with respect to said first timing signals; comparing the phases of said first and second timing signals; and delaying at least some of said writing times so that they do not coincide with said reading times, said writing times being delayed by varying delay periods in accordance with the difference obtained from said comparison step between the phases of said first and second timing signals.

Claim 16

Dependent Claim 35 words

A method according to claim 11 wherein said information to be processed is in the form of video signals and wherein said first timing signals are derived from the said video signals to be processed.

Claim 17

Dependent Claim 29 words

A method according to claim 12 wherein said writing times are delayed by a period which is reset by line synchronizing pulses of said video signals to be processed.

Claim 18

Dependent Claim 61 words

A method according to claim 12, 13 or 10 wherein the writing times are further delayed when they occur after a blanking period of the processed video signal and before the next blanking period of the signal to be processed, said further delay being chosen so that the reading and writing times do not coincide with each other during said period.

Claim 19

Dependent Claim 38 words

A method according to claim 12, 13 or 10 wherein said video signals are converted into digital codes and fed to said memory means and wherein the digital output of said memory means is converted into analog form.

Claim 20

Dependent Claim 20 words

A method according to claim 15 wherein the digital codes are delayed by the same amount as the timing signals.

Claim 21

Dependent Claim 54 words

A method according to claim 12, 13, 11 or 10 for synchronizing video signals with synchronising pulses derived independently of the said video signals; wherein said first timing signals are derived from synchronizing pulses belonging to the signal being processed; and said second timing signals are derived from the said independently derived synchronizing pulses.

Claim 22

Dependent Claim 153 words

Information processing apparatus comprising first timing means for receiving a remote signal, said first timing means generating line frequency and write pulses corresponding to said remote signal; second timing means for receiving a local signal and generating read pulses corresponding thereto; comparator means coupled to said first and second timing means for generating an output signal corresponding to the phase difference between said line frequency and read pulses; delay means coupled to said first timing means and said comparator means for delaying said write pulses in accordance with the phase difference between said line frequency and read pulses; memory means having an output, a first input coupled to said delay means for receiving said delayed write pulses and a second input coupled to said second timing generator for receiving said read pulses, the delay generated by said delay means preventing said write and read pulses from being applied simultaneously to said memory means.

Claim 23

Dependent Claim 153 words

Information processing apparatus comprising first timing means for receiving a remote signal, said first timing means generating line frequency and write pulses corresponding to said remote signal; second timing means for receiving a local signal and generating read pulses corresponding thereto; comparator means coupled to said first and second timing means for generating an output signal corresponding to the phase difference between said line frequency and read pulses; delay means coupled to said first timing means and said comparator means for delaying said write pulses in accordance with the phase difference between said line frequency and read pulses; memory means having an output, a first input coupled to said delay means for receiving said delayed write pulses and a second input coupled to said second timing generator for receiving said read pulses, the delay generated by said delay means preventing said write and read pulses from being applied simultaneously to said memory means.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1987-03-27	1987-09-26	1988-03-27	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	1991-03-27	1991-09-26	1992-03-27	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	1995-03-27	1995-09-26	1996-03-27	$7700.00	Window Closed / Lapsed

Apparatus and method for processing television picture signals and other information

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