US4433374A — Cache/disk subsystem with cache bypass

Claim 1

Independent Claim 337 words

In a data processing system of the type having, a bulk memory having addressable space for storing data; a host processor for issuing read or write commands, each command defining an operation to be performed and specifying the starting address and the length of the bulk memory space at which said operation is to be performed; A cache store for storing copies of segments of data which are stored in, or are to be stored in said bulk memory; and, a storage control unit connected to said host processor, said bulk memory and said cache store and responsive to commands from said host processor for controlling the transfer of data between said host processor, said bulk memory, and said cache store, said storage control unit being normally operative in response to any given one of said commands issued from said host processor defining a transfer of data between said host processor and said bulk memory for writing a copy of said data in said cache store, the improvement comprising: storage means for storing a bypass value indicative of the maximum number of segments which may be written into said cache store in response to any of said commands; first comparing means in said storage control unit for comparing said bypass value with the length of bulk memory space specified by said given command prior to the transfer of any data between said bulk memory and said host processor; means in said storage control unit responsive to said comparing means for inhibiting the writing of data into said cache store in response to said given command if said comparison indicates that said bypass value is less than the length of bulk memory space specified by said given command; and, means in said storage control unit responsive to said comparing means for writing into said cache store a copy of the data specified by said given command if said comparison indicates that said bypass value is greater than the length of bulk memory space specified by said given command.

Claim 2

Dependent Claim 337 words

In a data processing system of the type having, a bulk memory having addressable space for storing data; a host processor for issuing read or write commands, each command defining an operation to be performed and specifying the starting address and the length of the bulk memory space at which said operation is to be performed; A cache store for storing copies of segments of data which are stored in, or are to be stored in said bulk memory; and, a storage control unit connected to said host processor, said bulk memory and said cache store and responsive to commands from said host processor for controlling the transfer of data between said host processor, said bulk memory, and said cache store, said storage control unit being normally operative in response to any given one of said commands issued from said host processor defining a transfer of data between said host processor and said bulk memory for writing a copy of said data in said cache store, the improvement comprising: storage means for storing a bypass value indicative of the maximum number of segments which may be written into said cache store in response to any of said commands; first comparing means in said storage control unit for comparing said bypass value with the length of bulk memory space specified by said given command prior to the transfer of any data between said bulk memory and said host processor; means in said storage control unit responsive to said comparing means for inhibiting the writing of data into said cache store in response to said given command if said comparison indicates that said bypass value is less than the length of bulk memory space specified by said given command; and, means in said storage control unit responsive to said comparing means for writing into said cache store a copy of the data specified by said given command if said comparison indicates that said bypass value is greater than the length of bulk memory space specified by said given command.

Claim 3

Dependent Claim 96 words

A data processing system as claimed in claim 3 wherein: the given command issued by said host processor specifies the starting address and the number of words to be transferred, said storage control unit including converting means for converting the specified number of words to a converted value specifying the number of segments involved in the transfer, said comparing means comprising means responsive to said converting means for comparing said converted value with said bypass value to inhibit the writing of data into said cache store if said converted value is greater than said bypass value.

Claim 4

Dependent Claim 200 words

A data processing system as claimed in claim 2 wherein said bulk memory comprises at least one disk on which data is recorded by segments, said storage means includes means for storing a second bypass value indicative of a second maximum number of segments which may be written into in said cache store in response to said given command; and said storage control unit includes, means for determining if said given command specifies bulk memory space having a starting address which begins on a segment boundary and a length equal to an integral number of segments; second comparing means responsive to said means for determining, said conversion means and said second bypass value for comparing said converted value with said second bypass value only if said given command specifies bulk memory space having a starting address which begins on a segment boundary and a length equal to an integral number of segments, said second comparing means including means producing an output signal if said bypass value is less than said converted value; and, means responsive to said output signal for inhibiting said first comparing means and the writing of data into said cache store in response to said given command.

Claim 5

Dependent Claim 333 words

In a data processing system including a bulk memory having addressable space for storing data, a host processor for issuing read or write commands, each command defining an operation to be performed and specifying the starting address and the length of the bulk memory space at which said operation is to be performed, a cache store for storing copies of segments of data which are stored in, or are to be stored in said bulk memory, storage means for storing variables, and a storage control unit connected to said bulk memory, said host processor, said cache store and said storage means and responsive to any given one of said commands issued from said host processor for controlling the transfer of data between said host processor, said bulk memory and said cache store, said storage control unit being normally operative in response to said given command from said host processor defining a transfer of data between said host processor and said bulk memory for writing a copy of said transferred data in said cache store, the method of preventing the filling of said cache store with data which is not likely to be soon used again, said method comprising: creating a first variable representing a first theshold data transfer length, said first threshold length defining the maximum number of segments in said cache memory which may be written in response to any of said commands; comparing said first variable with the length of bulk memory space specified by said given command prior to the transfer of any data between the bulk memory and the host processor; inhibiting the writing of a copy of said transferred data into said cache store if said first threshold data transfer length is less than the length of bulk memory space specified by said given command; and, writing a copy of said transferred data into said cache store if said first threshold data transfer length is greater than the length of bulk memory space specified by said given command.

Claim 6

Dependent Claim 333 words

In a data processing system including a bulk memory having addressable space for storing data, a host processor for issuing read or write commands, each command defining an operation to be performed and specifying the starting address and the length of the bulk memory space at which said operation is to be performed, a cache store for storing copies of segments of data which are stored in, or are to be stored in said bulk memory, storage means for storing variables, and a storage control unit connected to said bulk memory, said host processor, said cache store and said storage means and responsive to any given one of said commands issued from said host processor for controlling the transfer of data between said host processor, said bulk memory and said cache store, said storage control unit being normally operative in response to said given command from said host processor defining a transfer of data between said host processor and said bulk memory for writing a copy of said transferred data in said cache store, the method of preventing the filling of said cache store with data which is not likely to be soon used again, said method comprising: creating a first variable representing a first theshold data transfer length, said first threshold length defining the maximum number of segments in said cache memory which may be written in response to any of said commands; comparing said first variable with the length of bulk memory space specified by said given command prior to the transfer of any data between the bulk memory and the host processor; inhibiting the writing of a copy of said transferred data into said cache store if said first threshold data transfer length is less than the length of bulk memory space specified by said given command; and, writing a copy of said transferred data into said cache store if said first threshold data transfer length is greater than the length of bulk memory space specified by said given command.

Claim 7

Dependent Claim 69 words

A method as claimed in claim 4 wherein the length of bulk memory space specified by said given command is specified as a number of words, said method further comprising: converting said specified number of words to a value representing an equivalent number of segments, a segment comprising an integral number of words; and, said comparing comprising comparing said variable with said value representing an equivalent number of segments.

Claim 8

Dependent Claim 158 words

A method as claimed in claim 5 and further comprising: creating a second variable representing a second threshold data transfer length, said second threshold length defining a second maximum number of segments in said cache memory which may be written to in response to said given command; determining from said cache command if said specified bulk memory space comprises an integral number of segments and starts at a segment boundary; comparing said second variable with said value representing an equivalent number of words if it is determined that said specified bulk memory space begins on a segment boundary and comprises an integral number of segments; and, inhibiting the writing of a copy of said transferred data into said cache store if the comparison of said second variable with said value representing an equivalent number of words indicates that said second threshold data transfer length is less than the length of bulk memory space specified by said given command.

Claim 9

Dependent Claim 140 words

A method as claimed in claim 6 wherein the step of comparing said first variable with said value representing an equivalent number of segments is not executed if the comparison of said second variable with said value representing an equivalent number of segments indicates that said second threshold data transfer length is less than the length of bulk memory space specified by said given command, whereby one threshold is employed to inhibit writing data into said cache store if the bulk memory space specified in said given command begins on a segment boundary and comprises an integral number of segments, and a second threshold is employed to inhibit writing data into said cache store if the bulk memory space specified in said given command does not begin on a segment boundary or does not comprise an integral number of segments.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1987-02-20	1987-08-22	1988-02-21	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	1991-02-20	1991-08-22	1992-02-21	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	1995-02-20	1995-08-22	1996-02-21	$7700.00	Window Closed / Lapsed

Cache/disk subsystem with cache bypass

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