Non-volatile programmable integrated semiconductor memory cell

Claim 1

A non-volatile programmable integrated semi-conductor cell comprising a semiconductive substrate of one conductivity type having an active surface; a reading insulated-gate field effect transistor (IGFET) including a part incorporated in said substrate and having an insulated gate at said active surface, and a floating gate electrode having a main portion juxtaposed with said insulated gate and extensions contiguous with said main portion and disposed along said active surface beyond the boundaries of said insulated gate; a pair of programming electrodes constituted by planar regions of the other conductivity type in said substrate, including a writing electrode and an erasing electrode each having an insulated gate of a thickness permitting junction crossing by hot carriers in partial overlap with said extensions of said floating gate electrode for capacitative coupling thereto, the region of overlap at said writing electrode being larger than that at said erasing electrode; and a diffusion region of said one conductivity type in said substrate next to and at a small distance from said writing electrode and having a surface area smaller than that of said writing electrode, the respective extension of said floating gate being juxtaposed with at least a portion of said surface area of said diffusion region, so that the recharging of said floating gate electrode is effected by minority carrier injection which takes place during the writing operation through said surface area portion of said diffusion region in the form of a current of hot minority carriers originating in said substrate, and during the erasing operation through the insulated gate of said erasing electrode.