US4424460A
Expired / Lapsed
US
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Apparatus and method for providing a logical exclusive OR/exclusive NOR function
Assignee: Boeing North American Inc
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Filing: 1981-07-14
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Granted: 1984-01-03
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Expires: 2001-07-14
Abstract
Abstract Circuits are illustrated using CMOS design techniques for incorporating N and P channel transistors into a circuit to obtain the functions of exclusive OR and exclusive NOR signal generation. This is accomplished by utilizing a given logic value signal as a control signal to pass the other input signal for three of the four possible logic value conditions. The fourth condition must generate the output signal from a selected one of the input signals, through the use of an inverter.
Inventors
- 👤 David W. Best
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 10:01
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/20; H03K19/21; H03K19/215
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
208 words
Apparatus for providing a logical exclusive OR function comprising, in combination: first means for providing a first logical input signal to be exclusively OR'd; second input means for supplying a second signal to be exclusively OR'd; output means for providing a output signal indicative in logic value of the exclusive OR combination of said first and second signals; first transmission gate means, including control means connected between said second logic value input signal and said outut means and further connected to said first logic value signal means for passing said second logic value signal to said output means in response to a logic zero control signal from said first input means; second transmission gate means connected between said first logic value input signal and said output means, said second transmission gates means including control means connected to said second logic value signal whereby said first logic value signals are passed to said output means when said second logic value signals are in a logic zero condition; and third transmission gate means including logic value inversion means and control input means, connected for passing said first logic value signals to said output means in an inverted condition whenever said second logic value signal is in a logic one condition.
Claim 2
Dependent Claim
208 words
Apparatus for providing a logical exclusive OR function comprising, in combination: first means for providing a first logical input signal to be exclusively OR'd; second input means for supplying a second signal to be exclusively OR'd; output means for providing a output signal indicative in logic value of the exclusive OR combination of said first and second signals; first transmission gate means, including control means connected between said second logic value input signal and said outut means and further connected to said first logic value signal means for passing said second logic value signal to said output means in response to a logic zero control signal from said first input means; second transmission gate means connected between said first logic value input signal and said output means, said second transmission gates means including control means connected to said second logic value signal whereby said first logic value signals are passed to said output means when said second logic value signals are in a logic zero condition; and third transmission gate means including logic value inversion means and control input means, connected for passing said first logic value signals to said output means in an inverted condition whenever said second logic value signal is in a logic one condition.
Claim 3
Dependent Claim
42 words
Apparatus as claimed in claim 1 wherein: said first transmission gate includes both P channel and N channel FET's; said second transmission gate means includes only an P channel FET; and said third transmission gate means includes only a N channel FET.
Claim 4
Dependent Claim
208 words
Apparatus for providing a logical exclusive NOR function comprising, in combination: first means for providing a first logical input signal to be exclusively NOR'd; second input means for supplying a second signal to be exclusively NOR'd; output means for providing a output signal indicative in logic value of the exclusive NOR combination of said first and second signals; first transmission gate means, including control means connected between said second logic value input signal and said output means and further connected to said first logic value signal means for passing said second logic value signal to said output means in response to a logic one control signal from said first input means; second transmission gate means connected between said first logic value input signal and said output means, said second transmission gates means including control means connected to said second logic value signal whereby said first logic value signals are passed to said output means when said second logic value signals are in a logic one condition; and third transmission gate means including logic value inversion means and control input means, connected for passing said first logic value signals to said output means in an inverted condition whenever said second logic value signal is in a logic zero condition.
Claim 5
Dependent Claim
208 words
Apparatus for providing a logical exclusive NOR function comprising, in combination: first means for providing a first logical input signal to be exclusively NOR'd; second input means for supplying a second signal to be exclusively NOR'd; output means for providing a output signal indicative in logic value of the exclusive NOR combination of said first and second signals; first transmission gate means, including control means connected between said second logic value input signal and said output means and further connected to said first logic value signal means for passing said second logic value signal to said output means in response to a logic one control signal from said first input means; second transmission gate means connected between said first logic value input signal and said output means, said second transmission gates means including control means connected to said second logic value signal whereby said first logic value signals are passed to said output means when said second logic value signals are in a logic one condition; and third transmission gate means including logic value inversion means and control input means, connected for passing said first logic value signals to said output means in an inverted condition whenever said second logic value signal is in a logic zero condition.
Claim 6
Dependent Claim
42 words
Apparatus as claimed in claim 3 wherein: said first transmission gate includes both P channel and N channel FET's; said second transmission gate means includes only an N channel FET; and said third transmission gate means includes only a P channel FET.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-01-02 | 1987-07-04 | 1988-01-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-01-02 | 1991-07-04 | 1992-01-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-01-02 | 1995-07-04 | 1996-01-03 | $7700.00 | Window Closed / Lapsed |