Integrated circuit incorporating low voltage and high voltage semiconductor devices

Claim 2

An integrated circuit comprising: A. a monolithic substrate having an underlying highly doped first region of a first conductivity type, a contact on the undersurface thereof, and a second moderately doped region of said first conductivity type overlaying said first region; B. low voltage control logic including a first, vertical, transistor comprising: (1) a first underlying emitter of said first conductivity type defined in said second region, and electrically connected to said contact, (2) a first base of a second conductivity type, disposed upon said first emitter to form a junction therewith, and (3) a first collector of said first conductivity type, disposed upon and horizontally bounded by said second base to form a junction therewith; C. a second, lateral, transistor of high voltage design for coupling said low voltage control logic to high voltage power transistor means, comprising: (1) a second emitter of said second conductivity type, disposed upon said second region, and coupled to the collector of said first transistor, (2) a second base of said first conductivity type defined in said second region and in electrical connection with said contact, laterally adjacent to said second emitter to form a junction therewith, and (3) a second collector of said second conductivity type disposed upon said second region, laterally adjacent to said second base to form a junction therewith, and formed deeply beneath the upper surface of said substrate so as to provide improved high voltage performance and a guard ring between said high voltage power transistor means and said low voltage control logic; and D. power transistor means of high voltage design including a third, vertical power transistor, comprising: (1) a third, underlying collector defined in said second region and electrically connected to said contact, (2) a third base of said second conductivity type, disposed upon said third collector to form a junction therewith, shielded from said low voltage control logic by said guard ring, and electrically connected thereto, and (3) a third emitter of said first conductivity type, disposed upon and horizontally bounded by said third base to form a junction therewith.

Claim 3

An integrated circuit as set forth in claim 1 wherein: said moderately doped second region has two layers, the lowermost layer being of higher conductivity and the uppermost layer being of lower conductivity for enhancement of the performance of said second lateral transistor and said power transistor means.

Claim 4

An integrated circuit as set forth in claim 2 wherein: the base of said second transistor is divided into two laterally arranged portions of differing conductivities for improved high voltage performance, the first base portion in closer proximity to said second collector being of lower conductivity and the second base portion in closer proximity to said second emitter being of higher conductivity.

Claim 5

An integrated circuit as set forth in claim 3 wherein: the said second base portion of said second transistor is relatively deep for enhancement of the performance of said second transistor.

Claim 6

An integrated circuit as set forth in claim 4 wherein: the base of said third power transistor means is relatively deep for enhancement of the performance of said power transistor means.

Claim 7

An integrated circuit as set forth in claim 5 wherein: said power transistor means (D) includes a fourth, vertical power transistor arranged for Darlington interconnection with said third, vertical power transistor, said fourth transistor comprising: (1) a fourth underlying collector defined in said second region and electrically connected to said contact, (2) a fourth base of said second conductivity type, disposed upon said fourth collector to form a junction therewith and shielded from said low voltage control logic by said guard ring and electrically connected thereto, and (3) a fourth emitter of said first conductivity type, disposed upon and horizontally bounded by said fourth base to form a junction therewith.

Claim 8

An integrated circuit as set forth in claim 5 having in addition thereto: E. current supply means including a fourth, lateral transistor comprising: (1) a fourth, underlying base of said first conductivity type defined in said second region and electrically connected to said contact, (2) a fourth emitter of said second conductivity type disposed upon said fourth base to form a junction therewith, and (3) a fourth collector of said second conductivity type disposed upon said fourth base to form a junction therewith and laterally displaced from said fourth emitter, said fourth collector being connected to the emitter of said second, lateral transistor for the supply of emitter current thereto.

Claim 9

An integrated circuit as set forth in claim 7 wherein said current supply means (E) have in addition thereto a fifth, lateral transistor comprising: (1) a fifth, underlying base of said first conductivity type defined in said second region and electrically connected to said contact, (2) a fifth emitter of said second conductivity type disposed upon said fifth base to form a junction therewith, and (3) a fifth collector of said second conductivity type disposed upon said fifth base to form a junction therewith and laterally displaced from said first emitter, said fifth collector being a continuation of the base of said first, vertical transistor for the supply of base current thereto.

Claim 10

An integrated circuit as set forth in claim 8 wherein said current supply means (E) have in addition thereto means comprising: (1) a first diode region of said first conductivity type electrically connected to said contact, (2) a second diode region of said second conductivity type forming a junction with said first diode region, the current capacity of said current supply means via said contact being equal to the current requirement of said power transistor means to permit serial connection to an external source, the voltage drop established by said diode means when so energized establishing a sufficiently stable low voltage irrespective of pulsating variations of the potential of said external source, suitable for energization of said low voltage control logic.

Claim 11

An integrated circuit as set forth in claim 1 wherein: said first conductivity type is n type and said second conductivity type is p type.

Claim 12

An integrated circuit comprising: A. first and second terminal means upon said integrated circuit for connection to the respective terminals of a relatively high voltage unidirectional voltage source; B. a monolithic substrate having an underlying highly doped first region of a first conductivity type, a contact on the undersurface thereof, and a second moderately doped region of said first conductivity type overlaying said first region; C. low voltage control logic including a first, vertical control transistor comprising: (1) a first underlying emitter of said first conductivity type defined in said second region, and electrically connected to said contact, (2) a first base of said second conductivity type, disposed upon said first emitter to form a junction therewith, and (3) a first collector of said first conductivity type, disposed upon and horizontally bounded by said second base to form a junction therewith; D. a second lateral transistor of high voltage design for coupling said low voltage control logic to high voltage power transistor means, comprising: (1) a second emitter of said second conductivity type, disposed upon said second region, and coupled to the collector of said first transistor, (2) a second base of said first conductivity type defined in said second region and electrically connected to said contact, laterally adjacent to said third emitter to form a junction therewith, and (3) a second collector of said second conductivity type disposed upon said second region, laterally adjacent to said second base to form a junction therewith; and E. power transistor means of high voltage design including a first, vertical power transistor, comprising: (1) a third underlying collector defined in said second region and electrically connected to said contact, (2) a third base of said second conductivity type, disposed upon said third collector to form a junction therewith, and coupled to said second collector, and (3) a third emitter of said first conductivity type, disposed upon and horizontally bounded by said first base to form a junction therewith, said emitter being connected to said second terminal means; and F. current supply means comprising: (1) a first diode region of said first conductivity type electrically connected to said contact, (2) a second diode region of said second conductivity type electrically connected to said first terminal means and forming a junction with said first diode region, the current capacity of said current supply means via said contact being equal to the current requirement of said power transistor means to permit serial energization thereof by said unidirectional source, the voltage drop established by said diode when so energized establishing a sufficiently stable low voltage irrespective of large variations of the potential of said external source, suitable for energization of said low voltage control logic.

Claim 13

An integrated circuit comprising: A. first and second terminal means upon said integrated circuit for connection to the respective terminals of a relatively high voltage unidirectional voltage source; B. a monolithic substrate having an underlying highly doped first region of a first conductivity type, a contact on the undersurface thereof, and a second moderately doped region of said first conductivity type overlaying said first region; C. low voltage control logic including a first, vertical control transistor comprising: (1) a first underlying emitter of said first conductivity type defined in said second region, and electrically connected to said contact, (2) a first base of said second conductivity type, disposed upon said first emitter to form a junction therewith, and (3) a first collector of said first conductivity type, disposed upon and horizontally bounded by said second base to form a junction therewith; D. a second lateral transistor of high voltage design for coupling said low voltage control logic to high voltage power transistor means, comprising: (1) a second emitter of said second conductivity type, disposed upon said second region, and coupled to the collector of said first transistor, (2) a second base of said first conductivity type defined in said second region and electrically connected to said contact, laterally adjacent to said third emitter to form a junction therewith, and (3) a second collector of said second conductivity type disposed upon said second region, laterally adjacent to said second base to form a junction therewith; and E. power transistor means of high voltage design including a first, vertical power transistor, comprising: (1) a third underlying collector defined in said second region and electrically connected to said contact, (2) a third base of said second conductivity type, disposed upon said third collector to form a junction therewith, and coupled to said second collector, and (3) a third emitter of said first conductivity type, disposed upon and horizontally bounded by said first base to form a junction therewith, said emitter being connected to said second terminal means; and F. current supply means comprising: (1) a first diode region of said first conductivity type electrically connected to said contact, (2) a second diode region of said second conductivity type electrically connected to said first terminal means and forming a junction with said first diode region, the current capacity of said current supply means via said contact being equal to the current requirement of said power transistor means to permit serial energization thereof by said unidirectional source, the voltage drop established by said diode when so energized establishing a sufficiently stable low voltage irrespective of large variations of the potential of said external source, suitable for energization of said low voltage control logic.

Claim 14

An integrated circuit as set forth in claim 11 wherein said current supply means have in addition thereto a fourth, lateral transistor comprising: (1) a fourth, underlying base of said first conductivity type defined in said second region and electrically connected to said contact, (2) a fourth emitter of said second conductivity type disposed upon said fourth base to form a junction therewith, said emitter being connected to said first terminal means, and (3) a fourth collector of said second conductivity type disposed upon said fourth base to form a junction therewith and laterally displaced from said fourth emitter, said fourth collector being connected to the emitter of said second, lateral transistor for the supply of emitter current thereto.

Claim 15

An integrated circuit as set forth in claim 11 wherein said current supply means have in addition thereto a fourth, lateral transistor comprising: (1) a fourth, underlying base of said first conductivity type defined in said second region and electrically connected to said contact, (2) a fourth emitter of said second conductivity type disposed upon said fourth base to form a junction therewith, said emitter being connected to said first terminal means, and (3) a fourth collector of said second conductivity type disposed upon said fourth base to form a junction therewith and laterally displaced from said fourth emitter, said fourth collector being a continuation of the base of said first, vertical transistor for the supply of base current thereto.

Claim 16

An integrated circuit as set forth in claim 13 wherein: said first conductivity type is n type and said second conductivity type is p type.