Ignition timing correcting system for internal combustion engine

Claim 2

An ignition time correcting system for an internal combustion engine comprising: a reference generator means for generating a reference signal at a reference angular position of the rotation of an internal combustion engine; an ignition generator means for generating an ignition signal at an angular position of the rotation of the engine leading that for said reference signal, said ignition signal having a predetermined advance characteristic, a phase shifter means connected to said ignition generator means to control a retardation of said ignition signal in response to a control input applied thereto, an ignition means connected to said phase shifter means to generate an ignition voltage in response to an output from said phase shifter means; a first means for delivering to said phase shifter means a control signal for determining the retardation of said ignition signal due to said phase shifter means; a control means for controlling a signal supplied said first means in accordance with a phase difference between said reference signal and an output from said phase shifter means during a predetermined mode of operation of the internal combustion engine, said control means having a first control gain upon the control effected in a direction to increase the retardation of said ignition signal resulting from said phase shifter means, and a second control gain different from said first control gain upon the control effected in a direction to decrease said retardation of said ignition signal.

Claim 3

An ignition timing correcting system as claimed in claim 1, wherein said first means comprises a potentiometer.

Claim 4

An ignition timing correcting system as claimed in claim 1, wherein said control means includes: a phase difference detector for detecting a phase difference between said reference signal from said reference signal generator and an output from said phase shifter means; an idling sensor for sensing the idling mode of operation of the internal combustion engine and for delivering an idling signal; a gate circuit responsive to the delivery of said idling signal from said idling sensor only when an output signal from said phase difference detector is not less than a predetermined magnitude so as to pass said output signal from said phase difference detector therethrough; a pulse width correction circuit for correcting a pulse width of an advance or retardation correcting signal passed through said gate circuit with a correction factor, said correction factor for the advance correcting signal being different from that for the retardation correcting signal; and a driving circuit for operating said first means in response to an output from said pulse width correction circuit.

Claim 5

An ignition timing correcting system as claimed in claim 3, wherein said pulse width correction circuit comprises: a first semiconductor switching element operative upon the passage of said advance correcting signal through said gate circuit; a first capacitor responsive to the operation of said first semiconductor switching element to charge and discharge; a first charging and discharging circuit for charging and discharging said first capacitor; and a first comparator responsive to a voltage across said first capacitor when said voltage is in excess of a predetermined magnitude to deliver an output therefrom; and wherein said pulse width correction circuit further comprises: a second semiconductor switching element operative upon the passage of said retardation correcting signal through said gate circuit; a second capacitor responsive to the operation of said second semiconductor switching element to charge and discharge; a second charging and discharging circuit for charging and discharging said second capacitor; and a second comparator responsive to a voltage across said second capacitor when said voltage is in excess of a predetermined magnitude to deliver an output therefrom; said first and second charging and discharging circuits having respective charging and discharging time constants arranged so that one of said first and second charging and discharging circuits has a larger charging time constant and a smaller discharging time constant than the other of said first and second charging and discharging circuits.