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US4408388A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for manufacturing a bipolar integrated circuit device with a self-alignment base contact

Assignee: Toshiba Corp
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Filing: 1981-04-08
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Granted: 1983-10-11
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Expires: 2001-04-08
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Abstract

Abstract A method for manufacturing a semiconductor integrated circuit device having a plurality of bipolar transistors is characterized in that, using an antioxidant insulation film pattern as a mask, an underlying conductive layer is overetched to form a conductive layer pattern; the antioxidant insulation film pattern is of overhanging structure with respect to the conductive pattern; a first thermally oxidized film is grown on the circumferential surface of the conductive layer pattern and a second thermally oxidized film is formed on the exposed part of a semiconductor substrate or semiconductor layer; and the second thermally oxidized film on the semiconductor substrate or the semiconductor layer is anisotropicetched away using the antioxidant insulation film pattern as a mask.

Inventors

  • 👤 Shuichi Kameyama

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 21:21
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10P; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/1414; H10P32/17; H10P32/171; H10P76/00; H10P76/40; H10P95/00

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 225 words
A method for manufacturing a semiconductor integrated circuit device having a plurality of bipolar transistors at least one of which includes a base region, comprising the steps of: forming a conductive layer directly on the base region; forming an antioxidant insulation film of high insulation characteristic on said conductive layer; patterning said antioxidant insulation film to form an antioxidant insulation film pattern; overetching said underlying conductive layer using said antioxidant insulation film pattern as a mask to form a conductive layer pattern such that said antioxidant insulation film pattern overhangs said conductive layer pattern; thermally oxidizing the circumferential surface of said conductive layer pattern and an exposed part of said base region to grow a first thermally oxidized film on the circumferential surface of said conductive layer pattern and a second thermally oxidized film on the exposed part of said base region; said first thermally oxidized film being thicker than said second thermally oxidized film; removing said second thermally oxidized film on said base region by anisotropic etching with gaseous ions substantially vertically incident on the surface of said base region with said antioxidant insulation film pattern as a mask, thereby exposing a portion of said base region; and forming a base electrode wiring connected to said base region, said base electrode wiring covering said antioxidant insulation film pattern and said first thermally oxidized film.
Claim 2
Independent Claim 225 words
A method for manufacturing a semiconductor integrated circuit device having a plurality of bipolar transistors at least one of which includes a base region, comprising the steps of: forming a conductive layer directly on the base region; forming an antioxidant insulation film of high insulation characteristic on said conductive layer; patterning said antioxidant insulation film to form an antioxidant insulation film pattern; overetching said underlying conductive layer using said antioxidant insulation film pattern as a mask to form a conductive layer pattern such that said antioxidant insulation film pattern overhangs said conductive layer pattern; thermally oxidizing the circumferential surface of said conductive layer pattern and an exposed part of said base region to grow a first thermally oxidized film on the circumferential surface of said conductive layer pattern and a second thermally oxidized film on the exposed part of said base region; said first thermally oxidized film being thicker than said second thermally oxidized film; removing said second thermally oxidized film on said base region by anisotropic etching with gaseous ions substantially vertically incident on the surface of said base region with said antioxidant insulation film pattern as a mask, thereby exposing a portion of said base region; and forming a base electrode wiring connected to said base region, said base electrode wiring covering said antioxidant insulation film pattern and said first thermally oxidized film.
Claim 3
Dependent Claim 40 words
A method according to claim 1, further comprising, the step of implanting in the exposed base region atoms of the same conductivity type as that of said base region after removing said second thermally oxidized film on said base region.
Claim 4
Dependent Claim 54 words
A method according to claim 1 or 2, wherein: said base region is of one conductivity type; and said conductive layer pattern is made of polycrystalline silicon containing impurity atoms of opposite conductivity type and is used as a diffusion source for forming an emitter region or a collector region of opposite conductivity type.
Claim 5
Independent Claim 238 words
A method for manufacturing a semiconductor integrated circuit device having a plurality of bipolar transistors at least one of which has a base region comprising the steps of: forming an insulation film on a part of the base region; forming conductive layers directly on said base region and on said insulation film; forming an antioxidant insulation film of high insulation characteristic on the conductive layer; patterning the antioxidant insulation film to form an antioxidant insulation film pattern; overetching the underlying conductive layer with the antioxidant insulation film pattern as a mask to form a conductive layer pattern such that the antioxidant insulation film pattern overhangs the conductive layer pattern; thermally oxidizing the circumferential surface of the conductive layer pattern and an exposed part of said base region to grow a first thermally oxidized film on the circumferential surface of the conductive layer pattern and a second thermally oxidized film on the exposed part of said base region, said first thermally oxidized film being thicker than said second thermally oxidized film; removing said second thermally oxidized film on said base region by anisotropic etching with gaseous ions substantially vertically incident on the surface of said base region with the antioxidant insulation film pattern as a mask, thereby forming a base contact hole; and forming a base electrode wiring connected to said base region, said base electrode wiring covering the antioxidant insulation film pattern and the first thermally oxidized film.
Claim 6
Independent Claim 238 words
A method for manufacturing a semiconductor integrated circuit device having a plurality of bipolar transistors at least one of which has a base region comprising the steps of: forming an insulation film on a part of the base region; forming conductive layers directly on said base region and on said insulation film; forming an antioxidant insulation film of high insulation characteristic on the conductive layer; patterning the antioxidant insulation film to form an antioxidant insulation film pattern; overetching the underlying conductive layer with the antioxidant insulation film pattern as a mask to form a conductive layer pattern such that the antioxidant insulation film pattern overhangs the conductive layer pattern; thermally oxidizing the circumferential surface of the conductive layer pattern and an exposed part of said base region to grow a first thermally oxidized film on the circumferential surface of the conductive layer pattern and a second thermally oxidized film on the exposed part of said base region, said first thermally oxidized film being thicker than said second thermally oxidized film; removing said second thermally oxidized film on said base region by anisotropic etching with gaseous ions substantially vertically incident on the surface of said base region with the antioxidant insulation film pattern as a mask, thereby forming a base contact hole; and forming a base electrode wiring connected to said base region, said base electrode wiring covering the antioxidant insulation film pattern and the first thermally oxidized film.

References Cited (Backward Citations)

US3753807A Cited
US3940288A Cited
US3958323A Cited
US4148054A Cited
US4191603A Cited
US4251571A Cited
GB2030002A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1986-10-10 1987-04-11 1987-10-11 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1990-10-10 1991-04-11 1991-10-11 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1994-10-10 1995-04-11 1995-10-11 $7700.00 Window Closed / Lapsed

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