Patent US4407696A successfully refreshed from Google Patents.
US4407696A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Fabrication of isolation oxidation for MOS circuit
Assignee: STMicroelectronics lnc USA
•
Filing: 1982-12-27
•
Granted: 1983-10-04
•
Expires: 2002-12-27
Abstract
Abstract A method is disclosed for fabricating an isolation oxidation (44), also referred to as field oxide, to separate the active regions on the surface of an MOS integrated circuit. On the surface of a semiconductor substrate (24) there are fabricated in successive layers an oxide layer (26), a polysilicon layer (28) and a nitride layer (30). A patterned resist layer (32) is formed on the surface of the nitride layer (30). The nitride layer (30) is etched through an opening (34) in the resist layer (32), which is then removed. The isolation oxidation (44) is then grown through an opening (36) in the nitride layer (30). The isolation oxidation (44) comprises oxide derived from the oxide layer (26) and from oxide produced from the polysilicon layer (28) and the semiconductor substrate (24). Next, the nitride layer (30), the polysilicon layer (28) and the oxide layer (26) are etched. The resulting isolation oxidation (44) has a bird's-beak area (46) which is less than 50% of the width of a bird'-beak area (14) produced using conventional MOS manufacturing processes.
Inventors
- 👤 Yu-Pin Han
- 👤 Bing C. Ma
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 20:03
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/0125; H10W10/10; H10W10/13; Y; Y10; Y10S; Y10S438/00; Y10S438/966
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
122 words
A method for fabricating isolation oxidation on a silicon semiconductor substrate, comprising the steps of: producing a first oxide layer on the surface of said substrate, producing a polysilicon layer on the surface of said first oxide layer, producing a nitride layer on the surface of said polysilicon layer, etching said nitride layer to open an area therein, producing said isolation oxidation as a layer located in the region of the open area of said nitride layer, said isolation oxidation layer comprising said first oxide layer, oxide derived from said polysilicon layer and oxide derived from said semiconductor substrate, and etching said nitride layer, said polysilicon layer and said first oxide layer from at least the edges of said isolation oxidation layer.
Claim 2
Independent Claim
122 words
A method for fabricating isolation oxidation on a silicon semiconductor substrate, comprising the steps of: producing a first oxide layer on the surface of said substrate, producing a polysilicon layer on the surface of said first oxide layer, producing a nitride layer on the surface of said polysilicon layer, etching said nitride layer to open an area therein, producing said isolation oxidation as a layer located in the region of the open area of said nitride layer, said isolation oxidation layer comprising said first oxide layer, oxide derived from said polysilicon layer and oxide derived from said semiconductor substrate, and etching said nitride layer, said polysilicon layer and said first oxide layer from at least the edges of said isolation oxidation layer.
Claim 3
Dependent Claim
55 words
A method for fabrication isolation oxidation as recited in claim 1, wherein the thickness of said first oxide layer is in the range of 250-500 angstroms, the thickness of said polysilicon layer is in the range of 1,500-2,000 angstroms and the thickness of said nitride layer is in the range of 800 to 1,000 angstroms.
Claim 4
Dependent Claim
57 words
A method for fabricating an isolation oxidation as recited in claim 1, wherein the step of etching said nitride layer comprises the steps of: applying a patterned resist layer over said nitride layer, said resist layer having an opening therein, and etching said nitride layer through said opening to produce said open area in said nitride layer.
Claim 5
Dependent Claim
35 words
A method for fabricating an isolation oxidation as recited in claim 1, including the step of introducing an impurity into said polysilicon layer to enhance the oxidation thereof during the producing of said isolation oxidation.
Claim 6
Independent Claim
173 words
A method for fabricating isolation oxidation on a silicon semiconductor substrate, comprising the steps of: growing a first oxide layer on the surface of said substrate, depositing a polysilicon layer on the surface of said oxide layer, depositing a nitride layer on the surface of said polysilicon layer, applying a patterned photo resist layer on the surface of said nitride layer, said photo resist layer having an opening therein, etching said nitride layer through said opening in said resist layer to open an area in said nitride layer, growing said oxidation isolation as a layer located in the region of the open area of said nitride layer, said isolation oxidation layer comprising the portion of said first oxide layer beneath said area in said nitride layer, oxide derived from said polysilicon layer beneath said area in said nitride layer, and oxide derived from said substrate beneath said area of said nitride layer, and etching the remaining portion of said nitride layer, said polysilicon layer and said first oxide layer from said semiconductor substrate.
Claim 7
Independent Claim
173 words
A method for fabricating isolation oxidation on a silicon semiconductor substrate, comprising the steps of: growing a first oxide layer on the surface of said substrate, depositing a polysilicon layer on the surface of said oxide layer, depositing a nitride layer on the surface of said polysilicon layer, applying a patterned photo resist layer on the surface of said nitride layer, said photo resist layer having an opening therein, etching said nitride layer through said opening in said resist layer to open an area in said nitride layer, growing said oxidation isolation as a layer located in the region of the open area of said nitride layer, said isolation oxidation layer comprising the portion of said first oxide layer beneath said area in said nitride layer, oxide derived from said polysilicon layer beneath said area in said nitride layer, and oxide derived from said substrate beneath said area of said nitride layer, and etching the remaining portion of said nitride layer, said polysilicon layer and said first oxide layer from said semiconductor substrate.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-10-03 | 1987-04-04 | 1987-10-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-10-03 | 1991-04-04 | 1991-10-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-10-03 | 1995-04-04 | 1995-10-04 | $7700.00 | Window Closed / Lapsed |