Semiconductor integrated circuit device

Claim 1

A semiconductor integrated circuit device comprising: a plurality of word lines; a plurality of word drivers, each connected to one of said word lines; a plurality of hold lines; a plurality of pairs of bit lines, each bit line having a variable potential and each bit line pair selectively conducting an associated current including a sink current; a plurality of bit drivers, each connected to a corresponding pair of said bit lines; a plurality of memory cells of integrated injection logic, each connected to a corresponding one of said word lines, to a corresponding one of said hold lines and to a corresponding pair of said bit lines, each memory cell including: injectors comprising first and second transistors of a first conduction type which have a common emitter connected to said corresponding one of said word lines; a flip-flop comprising cross-coupled third and fourth transistors of a second conduction type, connected to said first and second transistors respectively, and an emitter connected to the corresponding pair of said bit lines; fifth and sixth transistors of a second conduction type, each comprising a base and a collector both connected in parallel with said third or fourth transistor, respectively and an emitter connected to the corresponding pair of said bit lines; said third, fourth, fifth and sixth transistors being connected to the corresponding one of said hold lines; and first clamp means for selectively raising the potential of a first bit line of each of said pairs of bit lines above that of the second bit line of each of said pairs of bit lines in response to a write enable signal and an input data signal, and for absorbing the sink current associated with each of said first bit lines.