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US4393574A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for fabricating integrated circuits

Assignee: Seiko Instruments Inc
•
Filing: 1980-12-05
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Granted: 1983-07-19
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Expires: 2000-12-05
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Abstract

Abstract A method of fabricating integrated circuits comprises forming a concave portion having bottom and side faces on a semiconductor single-crystal substrate, forming an insulating film on the faces of the concave portion except for at least a portion of the bottom face, and forming a first semiconductor growth layer on the insulating film-free portion of the bottom face of the concave portion by chemical vapor deposition using a mixture gas containing semiconductor chloride and hydrogen such that the top surface of the growth layer is the same level as the upper face of the substrate in the region adjoining the concave portion. Semiconductor devices are then fabricated in the substrate and growth layer. Alternatively, the first growth layer can be formed on the substrate and thereafter a concave portion can be etched in the first growth layer and then a second semiconductor growth layer can be formed on the bottom face of the concave portion such that the top surfaces of the first and second growth layers are at the same level. In another variation, the first growth layer can extend above the substrate surface, and a second growth layer can be formed on the substrate such that the top surface of the second growth layer is at the same level as that of the first growth layer.

Inventors

  • 👤 Masafumi Shimbo

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 09:34
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/20; H10P14/29; H10P14/2901; H10P14/2902; H10P14/2905; H10D; H10D84/00; H10D84/01; H10D84/0107; H10D84/0109; H10D84/02; H10D84/03; H10D84/038; H10D84/80; H10D84/82; H10P14/27; H10P14/271; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10P14/3414; H10P14/3418; H10P14/3421; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/018; H10W10/10

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 122 words
A method for fabricating integrated circuits comprising the steps of: forming a concave portion having bottom and side faces on a semiconductor single-crystal substrate; forming an insulating film on the faces of said concave portion except for at least one portion of the bottom face of said concave portion; forming a first semiconductor growth layer on the bottom face of said concave portion which is free of the insulating film by chemical vapor deposition using a mixture gas containing semiconductor chloride and hydrogen such that the top surface of the growth layer is at the same level as the upper face of the substrate in the region adjoining said concave portion; and, fabricating semiconductor devices in said substrate and said growth layer.
Claim 2
Independent Claim 122 words
A method for fabricating integrated circuits comprising the steps of: forming a concave portion having bottom and side faces on a semiconductor single-crystal substrate; forming an insulating film on the faces of said concave portion except for at least one portion of the bottom face of said concave portion; forming a first semiconductor growth layer on the bottom face of said concave portion which is free of the insulating film by chemical vapor deposition using a mixture gas containing semiconductor chloride and hydrogen such that the top surface of the growth layer is at the same level as the upper face of the substrate in the region adjoining said concave portion; and, fabricating semiconductor devices in said substrate and said growth layer.
Claim 3
Independent Claim 135 words
A method for fabricating integrated circuits comprising the steps of: forming a first semiconductor growth layer on a semiconductor single-crystal substrate by chemical vapor deposition using a mixture gas of semiconductor chloride and hydrogen; selectively etching the first semiconductor growth layer to form therein a concave portion having bottom and side faces; forming an insulating film on at least one side face of the concave portion; forming a second semiconductor growth layer on the bottom face of the concave portion, the second semiconductor growth layer being separated from the first semiconductor growth layer by said insulating film and the top surface of the second semiconductor growth layer being at the same level as the top surface of the first semiconductor growth layer; and fabricating semiconductor devices in said substrate and first and second growth layers.
Claim 4
Independent Claim 135 words
A method for fabricating integrated circuits comprising the steps of: forming a first semiconductor growth layer on a semiconductor single-crystal substrate by chemical vapor deposition using a mixture gas of semiconductor chloride and hydrogen; selectively etching the first semiconductor growth layer to form therein a concave portion having bottom and side faces; forming an insulating film on at least one side face of the concave portion; forming a second semiconductor growth layer on the bottom face of the concave portion, the second semiconductor growth layer being separated from the first semiconductor growth layer by said insulating film and the top surface of the second semiconductor growth layer being at the same level as the top surface of the first semiconductor growth layer; and fabricating semiconductor devices in said substrate and first and second growth layers.
Claim 5
Independent Claim 151 words
A method for fabricating integrated circuits comprising the steps of: forming a concave portion having bottom and side faces on a semiconductor single-crystal substrate; forming an insulating film on the faces of the concave portion except for at least one portion of the bottom face of the concave portion; forming a first semiconductor growth layer on the bottom face of the concave portion which is free of the insulating film by chemical vapor deposition using a mixture gas of semiconductor chloride and hydrogen such that the top surface of the growth layer extends a given distance above the upper surface of the substrate; forming a second semiconductor growth layer on the substrate such that the top surface of the second semiconductor growth layer is at the same level as the top surface of the first semiconductor growth layer; and fabricating semiconductor devices in said substrate and first and second growth layers.
Claim 6
Independent Claim 151 words
A method for fabricating integrated circuits comprising the steps of: forming a concave portion having bottom and side faces on a semiconductor single-crystal substrate; forming an insulating film on the faces of the concave portion except for at least one portion of the bottom face of the concave portion; forming a first semiconductor growth layer on the bottom face of the concave portion which is free of the insulating film by chemical vapor deposition using a mixture gas of semiconductor chloride and hydrogen such that the top surface of the growth layer extends a given distance above the upper surface of the substrate; forming a second semiconductor growth layer on the substrate such that the top surface of the second semiconductor growth layer is at the same level as the top surface of the first semiconductor growth layer; and fabricating semiconductor devices in said substrate and first and second growth layers.
Claim 7
Dependent Claim 53 words
A method for fabricating integrated circuits as claimed in claim 1, 2 or 3; wherein said step of fabricating semiconductor devices comprises fabricating at least one insulated gate type field effect transistor in said substrate and fabricating at least one bi-polar transistor or junction type field effect transistor in said first growth layer.
Claim 8
Dependent Claim 48 words
A method for fabricating integrated circuits as claimed in claim 2 or 3; wherein said step of fabricating semiconductor devices comprises fabricating a junction type field effect transistor in said first growth layer and fabricating a field effect transistor or a bi-polar transistor in said second growth layer.

References Cited (Backward Citations)

US3905037A Cited
US3439414A Cited
US3514845A Cited
US3764409A Cited
US3925120A Cited
US4141765A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1986-07-18 1987-01-17 1987-07-19 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1990-07-18 1991-01-17 1991-07-19 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1994-07-18 1995-01-17 1995-07-19 $7700.00 Window Closed / Lapsed

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