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US4381952A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for fabricating a low loss varactor diode

Assignee: RCA Corp
•
Filing: 1981-05-11
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Granted: 1983-05-03
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Expires: 2001-05-11
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Abstract

Abstract A low conductivity, first conductivity type epitaxial layer is formed on a substrate of high conductivity, first conductivity type semiconductor material. Conductivity modifiers of second conductivity type are then implanted into the epitaxial layer so as to create a PN junction in the epitaxial layer. The substrate is next thinned, and conductivity modifiers of first conductivity type are implanted into the thinned surface so as to form a very high conductivity layer at the thinned surface.

Inventors

  • 👤 Arye Rosen

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 03:31
CPC Classifications
H; H10; H10P; H10P30/00; H10P30/20; H10P30/21; H10D; H10D1/00; H10D1/60; H10D1/62; H10D1/64; H10P30/202; H10P30/204; H10P30/28; H10P50/00; H10P50/60; H10P50/64; H10P50/642

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 104 words
A method for fabricating a low loss varactor diode, comprising the steps of: providing a high conductivity first conductivity type semiconductor substrate; epitaxially forming a low conductivity first conductivity type semiconductor layer on said substrate; implanting conductivity modifiers of second conductivity type into said epitaxial layer so as to form a very high conductivity layer at the surface thereof, said implanted layer forming a PN junction with said epitaxial layer; thinning the substrate so as to form a thinned surface; and implanting conductivity modifiers of first conductivity type into the thinned surface so as to form a very high conductivity layer at said surface.
Claim 2
Independent Claim 104 words
A method for fabricating a low loss varactor diode, comprising the steps of: providing a high conductivity first conductivity type semiconductor substrate; epitaxially forming a low conductivity first conductivity type semiconductor layer on said substrate; implanting conductivity modifiers of second conductivity type into said epitaxial layer so as to form a very high conductivity layer at the surface thereof, said implanted layer forming a PN junction with said epitaxial layer; thinning the substrate so as to form a thinned surface; and implanting conductivity modifiers of first conductivity type into the thinned surface so as to form a very high conductivity layer at said surface.
Claim 3
Dependent Claim 16 words
A method in accordance with claim 1, further comprising: annealing the structure following the implantation steps.
Claim 4
Dependent Claim 19 words
A method in accordance with claim 2, wherein the annealing following the second implantation is performed by laser irradiation.
Claim 5
Dependent Claim 22 words
A method in accordance with claim 1, further comprising: forming a first electrode on the epitaxial layer following the first implantation step.
Claim 6
Dependent Claim 21 words
A method in accordance with claim 1, further comprising: forming an electrode on said thinned surface following the second implantation step.
Claim 7
Independent Claim 31 words
A method in accordance with claims 4 or 5, wherein the electrode is formed by the steps of: sequentially evaporating chromium, platinum, and gold; and electroplating a relatively thick copper layer.
Claim 8
Dependent Claim 26 words
A method in accordance with claim 1, wherein the substrate is thinned by: etching the substrate in a mixture of 92% HNO 3 and 8% HF.
Claim 9
Dependent Claim 30 words
A method in accordance with claim 1, further comprising: forming the epitaxial layer with a carrier concentration of approximately 3×10 15 cm -3 and a thickness of approximately 6 microns.
Claim 10
Dependent Claim 26 words
A method in accordance with claim 8, further comprising: implanting at an energy level of 40-50 KeV and a dose of 1.5×10 15 cm -2 .
Claim 11
Dependent Claim 19 words
A method in accordance with claim 8, further comprising: thinning the substrate to a thickness of approximately 10 microns.

References Cited (Backward Citations)

US3523838A Cited
US3638300A Cited
US3878001A Cited
US3634738A Cited
US3840306A Cited
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US4106953A Cited
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US4230505A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1986-05-02 1986-11-01 1987-05-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1990-05-02 1990-11-01 1991-05-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1994-05-02 1994-11-01 1995-05-03 $7700.00 Window Closed / Lapsed

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