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US4366448A Expired / Lapsed US ⏱️ 0.0 years remaining

Power-amplifying circuit

Assignee: Toshiba Corp
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Filing: 1980-03-26
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Granted: 1982-12-28
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Expires: 2000-03-26
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Abstract

Abstract A power-amplifying circuit embodying this invention includes a pre-amplifier stage which comprises two emitter-connected transitors, one of whose bases is supplied with an input signal and an output stage comprising complementary pair of a first transistor of a PNP type and an emitter-grounded second transistor of an NPN type which carry out a class-AB push-pull operation in accordance with the amplitude of a current from the pre-amplifier stage. The power-amplifier circuit of this invention further comprises third transistor for detecting an operating current of the first transistor of the output stage, a fourth transistor which is driven by the third transistor and whose base is connected to the base of the second transistor of the output stage, and fifth and sixth transistors which are connected in such a manner that a sum of the base-emitter voltages of the fifth and sixth transistors is made equal to a sum of the base-emitter voltages of the second and fourth transistors, and through which there flows a current corresponding to a product of the operating currents of the first and second transistors constituting the output stage. A current running through the fifth and sixth transistors is supplied to the pre-amplifier means through a negative feedback path so as to be regulated.

Inventors

  • 👤 Hiromi Kusakabe
  • 👤 Masahide Nagumo

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 12:14
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/30; H03F3/3066; H03F1/00; H03F1/34; H03F3/3083; H03F3/3086; H03F3/3093

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 189 words
A power-amplifying circuit comprising: a pre-amplifier stage; an output stage having first and second transistors in a push-pull arrangement and adapted to be driven by said pre-amplifier stage, said first transistor having its emitter grounded; current detection means, having a third transistor with its base-to-emitter path connected in parallel with the base-to-emitter path of said second transistor, for detecting electric current flow through said second transistor; converting means, having a fourth transistor having its base connected to the base of said first transistor and having its emitter connected to an output terminal of said current detection means, for converting an output current of said current detection means to a voltage; a feedback path; and operation means connected to said converting means, having fifth and sixth transistors connected such that the sum of the base-to-emitter voltage of said first transistor and an output voltage of said converting means is equal to the sum of the base-to-emitter voltages of said fifth and sixth transistors, for supplying an electric current corresponding to a product of operating currents flowing through said first and second transistors to said pre-amplifier stage through said feedback path.
Claim 2
Dependent Claim 189 words
A power-amplifying circuit comprising: a pre-amplifier stage; an output stage having first and second transistors in a push-pull arrangement and adapted to be driven by said pre-amplifier stage, said first transistor having its emitter grounded; current detection means, having a third transistor with its base-to-emitter path connected in parallel with the base-to-emitter path of said second transistor, for detecting electric current flow through said second transistor; converting means, having a fourth transistor having its base connected to the base of said first transistor and having its emitter connected to an output terminal of said current detection means, for converting an output current of said current detection means to a voltage; a feedback path; and operation means connected to said converting means, having fifth and sixth transistors connected such that the sum of the base-to-emitter voltage of said first transistor and an output voltage of said converting means is equal to the sum of the base-to-emitter voltages of said fifth and sixth transistors, for supplying an electric current corresponding to a product of operating currents flowing through said first and second transistors to said pre-amplifier stage through said feedback path.
Claim 3
Dependent Claim 93 words
A power-amplifying circuit according to claim 1 in which said fourth transistor of said converting means is a PNP type transistor having its emitter connected to the collector of said third transistor and its collector grounded; said fifth transistor of said operations means is of an NPN type having its base connected to the emitter of said fourth transistor and its collector connected to the feedback path; and said sixth transistor is of an PNP type having its emitter connected to the emitter of said fifth transistor and its base and collector grounded.
Claim 4
Dependent Claim 47 words
The power-amplifying circuit according to claim 2, wherein said operation means includes a constant current generator, and supplies a current corresponding to a difference between a current produced by the constant current generator and a current flowing through said fifth and sixth transistors to said preamplifier means.
Claim 5
Dependent Claim 70 words
The power-amplifying circuit according to claim 2, in which said first and second transistors are NPN type transistors, said operation means further includes a capacitor connected in parallel to said fifth and sixth transistors and a constant current generator, and supplies a current corresponding to a difference between a current produced by the constant current generator and a current flowing through said fifth and sixth transistors to said pre-amplifier means.
Claim 6
Dependent Claim 116 words
A power-amplifying circuit comprising: a pre-amplifying stage; an output stage having first and second transistors in a push-pull arrangement which have their emitters connected to each other, and said first and second transistors are connected to be driven by said pre-amplifier stage; a feedback path; and operation means, having third and fourth transistors having their base-to-emitter paths connected in series with each other and said series coupled at one end to the base of said first transistor and at the other end to the base of said second transistor for supplying an electric current, corresponding to a product of operating currents flowing through said first and second transistors, to the pre-amplifying stage through said feedback path.
Claim 7
Dependent Claim 116 words
A power-amplifying circuit comprising: a pre-amplifying stage; an output stage having first and second transistors in a push-pull arrangement which have their emitters connected to each other, and said first and second transistors are connected to be driven by said pre-amplifier stage; a feedback path; and operation means, having third and fourth transistors having their base-to-emitter paths connected in series with each other and said series coupled at one end to the base of said first transistor and at the other end to the base of said second transistor for supplying an electric current, corresponding to a product of operating currents flowing through said first and second transistors, to the pre-amplifying stage through said feedback path.
Claim 8
Dependent Claim 40 words
A power-amplifying circuit according to claim 5, in which said first transistor of said output stage and said third transistor of said operation means are PNP transistors having their collectors grounded, and said second and fourth transistors are NPN transistors.

References Cited (Backward Citations)

GB1131217A Cited
US3434069A Cited
GB1440079A Cited
GB1461808A Cited
GB1467059A Cited
GB1503238A Cited
US4041407A Cited
US4072907A Cited
US4077012A Cited
DE2711912A1 Cited
US4176323A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1985-12-27 1986-06-28 1986-12-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1989-12-27 1990-06-28 1990-12-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1993-12-27 1994-06-28 1994-12-28 $7700.00 Window Closed / Lapsed

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