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US4072907A Expired / Lapsed US ⏱️ 0.0 years remaining

Amplifier circuit

Assignee: SHIN-SHIRASUNA ELECTRIC CORP
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Filing: 1976-11-11
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Granted: 1978-02-07
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Expires: 1996-11-11
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Abstract

Abstract An amplifier circuit comprising a differential circuit including means for preventing base bias voltages applied to driver transistors connected with the transistors constituting the differential amplifier from becoming unbalanced. Means is also provided which is adapted to prevent so-called shock noise from appearing at the output of the amplifier circuit. Such means may be constructed by using a delay circuit.

Inventors

  • 👤 Mamoru Sekiya
  • 👤 Nobuyuki Sakabe

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 07:18
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/30; H03F3/3069; H03F3/3071; H03F3/45; H03F3/45071; H03F3/45076; H03F3/4508; H03F3/45085; H03F2203/00; H03F2203/45; H03F2203/45472; H03F2203/45496; H03F2203/45598; H03F2203/45601; H03F2203/45701

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 244 words
An amplifier circuit including a differential amplifier circuit comprising a first transistor, a second transistor and a third transistor, the emitters of said first and second transistors being connected to each other, the collector of said third transistor being coupled to the connection between the emitters of said first and second transistors; a fourth transistor having the base thereof connected with the collector of said first transistor and having the emitter thereof coupled to one terminal of a power source; a fifth transistor having the base thereof connected with the emitter of said third transistor and having the emitter thereof coupled to the other terminal of said power source; voltage drop producing means; the collectors of said fourth and fifth transistors being connected with each other via said voltage-drop producing means; and a single-ended push-pull amplifier circuit comprising at least two transistors one of which has the base thereof connected with the collector of said fourth transistor and the other one of which has the base thereof connected with the collector of said fifth transistor; a first resistor connected between the collector of said first transistor and said one terminal of said power source, and a second resistor connected between the emitter of said third transistor and said other terminal of said power source, the values of said first and second resistors being selected so that the voltage across said first resistor and the voltage across said second resistor are equal to each other.
Claim 2
Dependent Claim 244 words
An amplifier circuit including a differential amplifier circuit comprising a first transistor, a second transistor and a third transistor, the emitters of said first and second transistors being connected to each other, the collector of said third transistor being coupled to the connection between the emitters of said first and second transistors; a fourth transistor having the base thereof connected with the collector of said first transistor and having the emitter thereof coupled to one terminal of a power source; a fifth transistor having the base thereof connected with the emitter of said third transistor and having the emitter thereof coupled to the other terminal of said power source; voltage drop producing means; the collectors of said fourth and fifth transistors being connected with each other via said voltage-drop producing means; and a single-ended push-pull amplifier circuit comprising at least two transistors one of which has the base thereof connected with the collector of said fourth transistor and the other one of which has the base thereof connected with the collector of said fifth transistor; a first resistor connected between the collector of said first transistor and said one terminal of said power source, and a second resistor connected between the emitter of said third transistor and said other terminal of said power source, the values of said first and second resistors being selected so that the voltage across said first resistor and the voltage across said second resistor are equal to each other.
Claim 3
Dependent Claim 101 words
An amplifier circuit according to claim 1, further comprising a delay circuit connected with the base of said third transistor, the delay time of said delay circuit being so established as to be substantially equal to or slightly longer than the duration time of noise which tends to occur and enter the input of said differential amplifier circuit when said power source is operatively connected with said amplifier circuit, whereby said third transistor is kept in a non-conductive state for a period of time corresponding to said delay time after the operative connection of said power source with said amplifier circuit.

References Cited (Backward Citations)

US3843935A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1981-02-06 1981-08-08 1982-02-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1985-02-06 1985-08-08 1986-02-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1989-02-06 1989-08-08 1990-02-07 $7700.00 Window Closed / Lapsed

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