Patent US4359754A successfully refreshed from Google Patents.
US4359754A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device
Assignee: Fujitsu Ltd
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Filing: 1980-03-28
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Granted: 1982-11-16
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Expires: 2000-03-28
Abstract
Abstract A semiconductor device used, for example, for the amplification of microwave signals, comprising a plurality of semiconductor elements mounted on a base and connected parallel to each other in order to gain high output power, wherein the same type of corresponding electrodes of the adjacent semiconductor elements are directly connected to each other so that self oscillation does not occur in the device and the operation thereof is stable.
Inventors
- 👤 Masahiro Hayakawa
- 👤 Yutaka Hirano
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 22:39
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/80; H10W; H10W44/00; H10W44/20; H10W90/00; H10W44/226; H10W72/00; H10W72/50; H10W72/531; H10W72/536; H10W72/5363; H10W72/541; H10W72/5445; H10W72/547; H10W72/5475
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
154 words
A semiconductor device comprising a base, a plurality of chips mounted on said base, each said chip comprising at least one selected plurality of corresponding circuit elements, said corresponding circuit elements being present on each said chip, a respective external common electrode mounted on said base corresponding to each said selected plurality of corresponding circuit elements on said chips, a respective plurality of connecting wires for individually connecting in parallel each of said selected plurality of corresponding circuit elements to the respective external common electrode, and at least one bonding wire for directly connecting between two selected ones of the corresponding circuit elements on different ones of said chips of at least one of said selected pluralities of corresponding circuit elements, wherein self oscillation in the operation of said device is reduced by the short circuiting provided by each said bonding wire connecting between the corresponding circuit elements on different ones of said chips.
Claim 2
Dependent Claim
154 words
A semiconductor device comprising a base, a plurality of chips mounted on said base, each said chip comprising at least one selected plurality of corresponding circuit elements, said corresponding circuit elements being present on each said chip, a respective external common electrode mounted on said base corresponding to each said selected plurality of corresponding circuit elements on said chips, a respective plurality of connecting wires for individually connecting in parallel each of said selected plurality of corresponding circuit elements to the respective external common electrode, and at least one bonding wire for directly connecting between two selected ones of the corresponding circuit elements on different ones of said chips of at least one of said selected pluralities of corresponding circuit elements, wherein self oscillation in the operation of said device is reduced by the short circuiting provided by each said bonding wire connecting between the corresponding circuit elements on different ones of said chips.
Claim 3
Dependent Claim
42 words
The device of claim 1, said chips being aligned in a row on said base, and one of said bonding wires directly connecting between each adjacent pair of the endmost ones of said corresponding circuit elements across adjacent ones of said chips.
Claim 4
Dependent Claim
90 words
The device of claim 2, comprising two of said external electrodes, two of said selected pluralities of corresponding elements on said chips connected by two respective ones of said pluralities of connecting wires to two respective ones of said external electrodes, and said bonding wires respectively directly connecting between each said adjacent pair of the endmost ones of said corresponding circuit elements across each adjacent pair of said chips, wherein said device with said parallel connected circuit elements comprises plural identical circuits connected in parallel between said two external electrodes.
Claim 5
Dependent Claim
32 words
The device of claim 1, 2 or 3, one of said external electrode(s) providing in parallel a respective DC voltage to the respective selected plurality of corresponding circuit elements on said chips.
Claim 6
Dependent Claim
46 words
The device of claim 1, 2 or 3, comprising a parallel connection of field effect transistors, each said field effect transistor comprising a respective semiconductor element of each said selected plurality, wherein said device comprises effectively a FET device with a correspondingly large effective gate width.
Claim 7
Dependent Claim
17 words
The device of claim 4, each said field effect transistor comprising a Schottky barrier field effect transistor.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-11-15 | 1986-05-17 | 1986-11-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-11-15 | 1990-05-17 | 1990-11-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-11-15 | 1994-05-17 | 1994-11-16 | $7700.00 | Window Closed / Lapsed |