Abstract An insulated gate type field effect transistor forming one cell of a high density integrated circuit semiconductor memory device and a method for producing the same are disclosed. A channel stopper region of the same conductivity type as the substrate but having a higher impurity concentration is disposed contiguous to the width edge of the channel region, and a thick field oxide film is provided outside of the channel stopper region. The channel stopper region is self-aligned with the width edges of the gate electrode, and an insulator film having a thinner film thickness than that of the thick field oxide film is formed on the channel stopper region. In one embodiment, a second channel stopper region similar to the first is provided at the surface of the substrate under the field oxide film. A capacitor region is associated with the field effect transistor, and together they form a memory cell which is substantially surrounded by an isolating region including the thick field oxide film.
A method for manufacturing a semiconductor device comprising the steps of forming an isolating region including a field oxide film on one major surface of semicondutor substrate of one conductivity type, forming a gate insulator film on said one major surface of said semiconductor substrate at a position surrounded by said isolating region, depositing on said gate insulator film a conductive film to provide a gate electrode, shaping the width edges of said gate electrode, and thereafter introducing impurities of said one conductivity type into said semiconductor substrate between the width edges of said gate electrode and said field oxide film opposed thereto to form a channel stopper region so that a boundary line of said channel stopper region is substantially in coincidence with said width edge of said gate electrode in the plane view.
Claim 2
Independent Claim
135 words
A method for manufacturing a semiconductor device comprising the steps of forming an isolating region including a field oxide film on one major surface of semicondutor substrate of one conductivity type, forming a gate insulator film on said one major surface of said semiconductor substrate at a position surrounded by said isolating region, depositing on said gate insulator film a conductive film to provide a gate electrode, shaping the width edges of said gate electrode, and thereafter introducing impurities of said one conductivity type into said semiconductor substrate between the width edges of said gate electrode and said field oxide film opposed thereto to form a channel stopper region so that a boundary line of said channel stopper region is substantially in coincidence with said width edge of said gate electrode in the plane view.
Claim 3
Dependent Claim
62 words
A method for manufacturing a semiconductor device of claim 1, further comprising the steps of shaping the length edge of said gate electrode and introducing impurities of the opposite conductivity type into said one major surface of said semiconductor substrate between the length edge of said gate electrode and said field oxide film opposed thereto to form a source or drain region.
Claim 4
Dependent Claim
20 words
A method for manufacturing a semiconductor device of claim 1, in which said conductive film is a polycrystalline silicon film.
Claim 5
Dependent Claim
19 words
A method for manufacturing a semiconductor device of claim 1, in which said conductive film is a molybdenum film.
Claim 6
Dependent Claim
40 words
A method for manufacturing a semiconductor device of claim 1, in which said impurities of said one conductivity type are introduced by ion implantation through said gate insulator film entending from under said gate electrode to said field oxide film.