US4356558A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Optimum second order digital filter
Assignee: Lockheed Martin Corp
•
Filing: 1979-12-20
•
Granted: 1982-10-26
•
Expires: 1999-12-20
Abstract
Abstract A second order digital filter utilizing six processor operations, two add instructions, two shift instructions and two store instructions. No multipliers are required. The filter is used as a digital filter in a servo loop having a Z transform of, G(Z)=4 (1-Z -1 )+Z -2 .
Inventors
- 👤 William J. Owen
- 👤 Robert A. Booker
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 10:47
CPC Classifications
H; H03; H03H; H03H17/00; H03H17/02; H03H17/04
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
124 words
A second order digital filter comprising: a first delay element receiving an input signal r(n); a first summing means receiving the signal r(n) and the output of said first delay element, and producing a summed output; shift register means receiving the output of said first summing means and shifting the summed output a predetermined number of places; a second delay element coupled to said first delay element, and; a second summing means receiving the outputs from said shift register and said second delay element and producing a compensated output c(n), where ∇ 2 c(n)=r(n)+k 1 (r(n)-r(n-1))+k 2 ((r(n)-r(n-1))-(r(n-1)-r(n-2)), wherein: k 1 and k 2 are binary scalars, r(n) is the latest input sample, r(n-1) is the prior sample, r(n-2) is the second prior sample.
Claim 2
Dependent Claim
124 words
A second order digital filter comprising: a first delay element receiving an input signal r(n); a first summing means receiving the signal r(n) and the output of said first delay element, and producing a summed output; shift register means receiving the output of said first summing means and shifting the summed output a predetermined number of places; a second delay element coupled to said first delay element, and; a second summing means receiving the outputs from said shift register and said second delay element and producing a compensated output c(n), where ∇ 2 c(n)=r(n)+k 1 (r(n)-r(n-1))+k 2 ((r(n)-r(n-1))-(r(n-1)-r(n-2)), wherein: k 1 and k 2 are binary scalars, r(n) is the latest input sample, r(n-1) is the prior sample, r(n-2) is the second prior sample.
Claim 3
Dependent Claim
17 words
The digital filter of claim 1 wherein said shift register is a two place left shift register.
Claim 4
Dependent Claim
21 words
The digital filter of claim 1 wherein the transfer function in Z for said filter is G(Z)=Z.sup.-2 (k.sub.2)+Z.sup.-1 (-k.sub.1 -2k.sub.2)+(1+k.sub.1 +k.sub.2).
Claim 5
Dependent Claim
20 words
The digital filter of claim 1 wherein said filter has a function in the dimensionless frequency plane w of: ##EQU8##
Claim 6
Dependent Claim
12 words
The digital filter of claim 4 wherein the Z transform is: G(Z)=4(1-Z.sup.-1)+Z.sup.-2.
References Cited (Backward Citations)
US3619586A
Cited
US3914588A
Cited
US4016410A
Cited
US3979701A
Cited
US4170758A
Cited
US4149258A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-10-25 | 1986-04-26 | 1986-10-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-10-25 | 1990-04-26 | 1990-10-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-10-25 | 1994-04-26 | 1994-10-26 | $7700.00 | Window Closed / Lapsed |