Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
317 words
An ignition timing controller for an internal combustion engine comprising, in combination: means for generating reference timing signals at fixed rotational angles in a cycle of said internal combustion engine, means for generating preliminary timing signals at advanced rotational angles in the cycle of said internal combustion engine which are advanced by a fixed predetermined angle with respect to said fixed rotational angles when said internal combustion engine is in a predetermined operational state and which are further advanced depending on an operating parameter of said internal combustion engine, which is indicative of a operational state of said internal combustion engine, initial value of said fixed predetermined angle being greater in magnitude than a variation of said advanced rotational angles due to accidental causes including aging of a system including said ignition timing controller and said internal combustion engine, means for retarding said preliminary timing signals by a controlled angle in the cycle of said internal cobustion engine, said retarded preliminary timing signals being applied to an ignition voltage generator of said internal combustion engine, thereby causing ignition voltage for said internal combustion engine to be generated, means for detecting an advance angle by which said retarded preliminary timing signals are advanced with respect to said reference timing signals in the cycle of said internal combustion engine, means for generating a control signal which is proportional in magnitude to an algebraic sum of said controlled angle and said advance angle, memory means, and means for causing said control signal to be memorized in said memory means when said internal combustion engine is in said predetermined state, said memory means applying said memorized control signal to said retarding means, thereby controlling said controlled angle so that said advance angle by which said preliminary advanced timing signals are advanced with respect to said reference timing signals become substantially zero, when said internal combustion engine is in said predetermined state.
Claim 2
Dependent Claim
317 words
An ignition timing controller for an internal combustion engine comprising, in combination: means for generating reference timing signals at fixed rotational angles in a cycle of said internal combustion engine, means for generating preliminary timing signals at advanced rotational angles in the cycle of said internal combustion engine which are advanced by a fixed predetermined angle with respect to said fixed rotational angles when said internal combustion engine is in a predetermined operational state and which are further advanced depending on an operating parameter of said internal combustion engine, which is indicative of a operational state of said internal combustion engine, initial value of said fixed predetermined angle being greater in magnitude than a variation of said advanced rotational angles due to accidental causes including aging of a system including said ignition timing controller and said internal combustion engine, means for retarding said preliminary timing signals by a controlled angle in the cycle of said internal cobustion engine, said retarded preliminary timing signals being applied to an ignition voltage generator of said internal combustion engine, thereby causing ignition voltage for said internal combustion engine to be generated, means for detecting an advance angle by which said retarded preliminary timing signals are advanced with respect to said reference timing signals in the cycle of said internal combustion engine, means for generating a control signal which is proportional in magnitude to an algebraic sum of said controlled angle and said advance angle, memory means, and means for causing said control signal to be memorized in said memory means when said internal combustion engine is in said predetermined state, said memory means applying said memorized control signal to said retarding means, thereby controlling said controlled angle so that said advance angle by which said preliminary advanced timing signals are advanced with respect to said reference timing signals become substantially zero, when said internal combustion engine is in said predetermined state.
Claim 3
Dependent Claim
25 words
A controller as claimed in claim 1, wherein said predetermined state of said internal combustion engine is an idling state of said internal combustion engine.
Claim 4
Dependent Claim
74 words
A controller as claimed in claim 2, wherein said memory causing means comprises: means for detecting the idling state of said internal combustion engine, and means for enabling said memory means so that said control signal applied to said memory means is caused to be memorized in said memory means, responsive to an output of said idling state detecting means applied to said enabling means indicating the idling state of said internal combustion engine.
Claim 5
Dependent Claim
196 words
A controller as claimed in any one of claims 1 to 3, wherein said angular difference detecting means comprises a circuit comprising: a first flip-flop, two input terminals of which are connected to output terminals of said preliminary timing signal generating means and said reference timing signal generating means, and which is set and reset by said preliminary timing signals and reference timing signals applied thereto, a second flip-flop, two input terminals of which are connected to output terminals of said preliminary timing signal generating means and said retarding means, and which is set and reset by said preliminary timing signals and said retarded preliminary timing signals, an exclusive OR gate, two inputs of which are connected to outputs of said first and second flip-flops, a first AND gate, two inputs of which are connected to an output of said exclusive OR gate and said first flip-flop respectively, and a second AND gate, two inputs of which are connected to the output terminal of said exclusive OR gate and said second flip-flop respectively, outputs of said first and second AND gates together indicating said angular difference between said retarded preliminary timing signals and reference timing signals.