Patent US4348762A successfully refreshed from Google Patents.
US4348762A
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Circuit for correcting data reading clock pulses
Assignee: Faurecia Clarion Electronics Co Ltd
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Filing: 1980-08-11
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Granted: 1982-09-07
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Expires: 2000-08-11
Abstract
Abstract A circuit for correcting data reading clock pulses, comprising a data reading device for reading data in response to clock pulses of a group or groups of different phases selected by one or more switches, a detector adapted to detect mis-reading of the data, a switch means and a switch control means. The switch control means is actuated by a detection signal of mis-reading to control the switch means so as to select clock pulse group or groups desired for accurate reading of the data.
Inventors
- 👤 Toshimi Shiun
- 👤 Hideo Fujii
- 👤 Yoshio Kizaki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 11:23
CPC Classifications
H; H04; H04L; H04L7/00; H04L7/02; H04L7/033; H04L7/0337
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
123 words
A circuit for correcting data reading clock pulses, which comprises: a means for generating a plurality of groups of clock pulses of different phases; a switch means for selecting and outputting one or more groups of clock pulses from said plurality of groups of clock pulses; a means for reading data in response to said one or more groups of clock pulses selected by said switch means; a means for detecting mis-reading of the data and outputting a detection signal indicating mis-reading; and a switch control means responsive to said detection signal to control said switch means so as to repeatedly select another group or groups of clock pulses until correct data reading is accomplished as determined by absence of said detection signal.
Claim 2
Dependent Claim
123 words
A circuit for correcting data reading clock pulses, which comprises: a means for generating a plurality of groups of clock pulses of different phases; a switch means for selecting and outputting one or more groups of clock pulses from said plurality of groups of clock pulses; a means for reading data in response to said one or more groups of clock pulses selected by said switch means; a means for detecting mis-reading of the data and outputting a detection signal indicating mis-reading; and a switch control means responsive to said detection signal to control said switch means so as to repeatedly select another group or groups of clock pulses until correct data reading is accomplished as determined by absence of said detection signal.
Claim 3
Dependent Claim
65 words
A circuit for correcting data reading clock pulses as claimed in claim 1, wherein said switch means includes a plurality of switches which are adapted to receive, at their respective inputs, corresponding groups of clock pulses, respectively, and adapted to be controlled by said switch control means so as to be closed or opened in response to the detection signal of mis-reading of the data.
Claim 4
Dependent Claim
84 words
A circuit for correcting data reading clock pulses as claimed in claim 1, wherein said switch control means is formed of a counter, said counter being adapted to count one group of clock pulses allocated thereto out of said plurality of groups of clock pulses and cause said switch means to select another group or groups of clock pulses of different phases when the mis-reading of the data remains uncorrected after said counter has counted a predetermined number of said clock pulses allocated thereto.
Claim 5
Independent Claim
76 words
A method for correcting data reading clock pulses which comprises: generating a plurality of groups of clock pulses of different phases; selecting one or more groups of clock pulses from said plurality of groups of clock pulses; reading data in response to the selected one or more groups of clock pulses; detecting mis-reading of the data; and repeatedly selecting another group or groups of clock pulses, upon detection of mis-reading, until correct data reading is accomplished.
Claim 6
Independent Claim
76 words
A method for correcting data reading clock pulses which comprises: generating a plurality of groups of clock pulses of different phases; selecting one or more groups of clock pulses from said plurality of groups of clock pulses; reading data in response to the selected one or more groups of clock pulses; detecting mis-reading of the data; and repeatedly selecting another group or groups of clock pulses, upon detection of mis-reading, until correct data reading is accomplished.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-09-06 | 1986-03-08 | 1986-09-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-09-06 | 1990-03-08 | 1990-09-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-09-06 | 1994-03-08 | 1994-09-07 | $7700.00 | Window Closed / Lapsed |