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US4342111A Expired / Lapsed US ⏱️ 0.0 years remaining

Digital bridging apparatus for telephone conferencing system

Assignee: National Security Agency
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Filing: 1980-11-18
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Granted: 1982-07-27
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Expires: 2000-11-18
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Abstract

Abstract A digital bridge for a telephone conferencing circuit which provides multiple conferencing capability. Microprocessor signals to a buffered memory control switching of parallel communications data into a time division multiplexed serial stream for transmission, with the position of data within each frame of the stream being a function of the intended destination. High speed switching capability results from the buffered memory circuit which is simultaneously filled with new data as current data is utilized.

Inventors

  • 👤 Donald G. Busson

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 23:31
CPC Classifications
H; H04; H04M; H04M3/00; H04M3/42; H04M3/56; H04M3/568; H04M3/569

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 97 words
In a digital conferencing apparatus wherein a multiplexer receives a plurality of input signals and provides a single serial data stream, and a demultiplexer receives said serial stream and subsequently provides a plurality of output signals, controlling means, comprising: a microprocessor; a first shift register which sequentially receives from said microprocessor signals indicative of the input signal to be routed into said serial data stream; a second shift register, and switching means connecting the outputs of said first and second shift registers to said multiplexer and also connecting said first shift register to said second shift register.
Claim 2
Dependent Claim 97 words
In a digital conferencing apparatus wherein a multiplexer receives a plurality of input signals and provides a single serial data stream, and a demultiplexer receives said serial stream and subsequently provides a plurality of output signals, controlling means, comprising: a microprocessor; a first shift register which sequentially receives from said microprocessor signals indicative of the input signal to be routed into said serial data stream; a second shift register, and switching means connecting the outputs of said first and second shift registers to said multiplexer and also connecting said first shift register to said second shift register.
Claim 3
Dependent Claim 33 words
The apparatus of claim 1 wherein said switching means comprises a plurality of switches, each switch having a first input from said first shift register and a second input from said second register.
Claim 4
Dependent Claim 27 words
The apparatus of claim 2 wherein each of said switches includes an input connected to said microprocessor for controlling the passage of input signals through said switches.

References Cited (Backward Citations)

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US3761619A Cited
US3787820A Cited
US3924082A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1985-07-26 1986-01-25 1986-07-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1989-07-26 1990-01-25 1990-07-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1993-07-26 1994-01-25 1994-07-27 $7700.00 Window Closed / Lapsed

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