Input protection device for integrated circuits

Claim 2

An input protection device for an integrated circuit on a semiconductor substrate of a first conductivity type comprising at least one metal pad on said substrate for forming external electrical connection, said metal pad being connected to a conducting region of a second conductivity type in said substrate by a metal-semiconductor alloy contact, said contact having significantly rounded edges whereby the tendency to form higher local currents through specific areas of said contact than through the other areas of said contact is reduced to prevent the formation of a metal-semiconductor alloy protrusion from said contact into said substrate upon a discharge of undesired electric charges.

Claim 3

The input protection device as in claim 1 wherein the integrated circuit comprises MOS transistors.

Claim 4

The input protection device as in claim 1 wherein said contact is substantially a circle.

Claim 5

The input protection device as in claim 1 wherein said contact is substantially a polygon.

Claim 6

The input protection device as in claim 4 wherein said contact is at least five microns across.

Claim 7

The input protection device as described in claim 1 wherein a first part of said conducting region below said contact is deeper in said substrate than a second part of said conducting region not below said contact.

Claim 8

The input protection device as in claim 6 wherein the edge of said conducting region extends laterally at least eight microns away from said contact.

Claim 9

An improved input protection device for an MOS integrated circuit on a semiconductor substrate of a first conductivity type having a metal pad on said substrate for forming external electrical connections, a first conducting region of a second conductivity type in said substrate, forming a P-N junction therebetween, said region at one end connected to said pad by a metal-semiconductor alloy contact and at the other end connected to the rest of said integrated circuit, a second conducting region of the second conductivity type in said substrate in close proximity to said first region between said one end and said other end of said first region, a gate over the substrate where said second region is in close proximity to said first region to form an input protection MOS transistor, the improvement comprising said contact having significantly rounded edges and the depth of said P-N junction at said one end greater than at said other end so as to reduce the tendency to form higher local current densities through specific areas of said contact than through other areas of said contact and to prevent the formation of a metal-semiconductor alloy protrusion from said contact into said substrate upon a discharge of undesired electric charges.

Claim 10

An improved input protection device for an MOS integrated circuit on a semiconductor substrate of a first conductivity type having a metal pad on said substrate for forming external electrical connections, a first conducting region of a second conductivity type in said substrate, forming a P-N junction therebetween, said region at one end connected to said pad by a metal-semiconductor alloy contact and at the other end connected to the rest of said integrated circuit, a second conducting region of the second conductivity type in said substrate in close proximity to said first region between said one end and said other end of said first region, a gate over the substrate where said second region is in close proximity to said first region to form an input protection MOS transistor, the improvement comprising said contact having significantly rounded edges and the depth of said P-N junction at said one end greater than at said other end so as to reduce the tendency to form higher local current densities through specific areas of said contact than through other areas of said contact and to prevent the formation of a metal-semiconductor alloy protrusion from said contact into said substrate upon a discharge of undesired electric charges.

Claim 11

The input protection device as in claim 8 wherein said P-N junction is laterally spaced at least eight microns away from said contact so as to prevent the formation of a metal-semiconductor protrusion laterally from said contact into said substrate upon discharge of said charges.

Claim 12

The input protection device as in claim 8 wherein the gate of said input protection MOS transistor is metal and has a second metal-semiconductor alloy contact with said first conducting region, said second contact having rounded edges to reduce the tendency to form higher local current densities through specific areas of said second contact through other areas of said second contact.

Claim 13

The input protection device as in claim 10 wherein the depth of said P-N junction below said second contact is greater than the depth of said junction at said other end.

Claim 14

The input protection device as in claim 11 wherein said substrate is P-type conductivity silicon, and said first and second region are N-type conductivity silicon.