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US3754171A Expired / Lapsed US ⏱️ 0.0 years remaining

An insulated gate type field effect semiconductor device having a breakdown preventing element

Assignee: Hitachi Ltd
•
Filing: 1968-02-23
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Granted: 1973-08-21
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Expires: 1988-02-23
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Abstract

Abstract An MOS field effect transistor comprising an N-type semiconductor substrate having a P type diffused region formed therein which is more shallow than a P type source and a P type drain diffused regions, the shallow diffused region being connected to a gate electrode by a conductive means, and utilizing the breakdown phenomenon of a PN junction formed between the shallow diffused region and the substrate thereby to prevent the breakdown of an insulating layer under the gate electrode.

Inventors

  • 👤 N Anzai
  • 👤 T Takagui
  • 👤 H Kawagoe
  • 👤 Y Kosa
  • 👤 M Kubo

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 14:53
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/80; H10D84/811; H10D89/00; H10D89/60; H10D89/601; H10W; H10W20/00; H10W20/40

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 197 words
An insulated gate type field effect semiconductor device having a breakdown preventing circuit element comprising: a semiconductor substrate of a first conductivity type having a principal surface; a first semiconductor region of a second conductivity type formed in the principal surface of said substrate; a second semiconductor region of a second conductivity type formed in said principal surface in a spaced relation to said first region, the depth of said second region being shallower than that of said first region; an insulating film extending on said principal surface of said substrate and covering at least one portion of a termination of a first PN junction formed between said first region and said substrate; a gate electrode on said insulating film, the reverse breakdown voltage of a second PN junction formed between said second region and said substrate being lower than the breakdown voltage of said insulating film under said gate electrode; a first and a second spaced conducting layer connected to the surface of said second region; and a conductive means connecting electrically said gate electrode layer and said first conducting layer, thereby an input signal is applied to said gate electrode through said second conducting layer.
Claim 2
Dependent Claim 197 words
An insulated gate type field effect semiconductor device having a breakdown preventing circuit element comprising: a semiconductor substrate of a first conductivity type having a principal surface; a first semiconductor region of a second conductivity type formed in the principal surface of said substrate; a second semiconductor region of a second conductivity type formed in said principal surface in a spaced relation to said first region, the depth of said second region being shallower than that of said first region; an insulating film extending on said principal surface of said substrate and covering at least one portion of a termination of a first PN junction formed between said first region and said substrate; a gate electrode on said insulating film, the reverse breakdown voltage of a second PN junction formed between said second region and said substrate being lower than the breakdown voltage of said insulating film under said gate electrode; a first and a second spaced conducting layer connected to the surface of said second region; and a conductive means connecting electrically said gate electrode layer and said first conducting layer, thereby an input signal is applied to said gate electrode through said second conducting layer.
Claim 3
Dependent Claim 104 words
A circuit device according to claim 1, wherein the resistance existing in said second region between said first and second conducting layers have a sufficiently large value to determine a time constant of circuit such that when a voltage exceeding the breakdown voltage of said insulating film under said gate electrode is applied between said second conducting layer and said first region and gives a reverse bias to said second PN junction between said substrate and said second region the voltage applied to said second PN junction reaches its reverse breakdown voltage before that applied to said insulating film reaches the breakdown voltage thereof.
Claim 4
Dependent Claim 38 words
An insulated gate type field effect semiconductor device according to claim 1, wherein said first and second conductivity types are N and P types respectively and the depth of said second region do not exceed 2 Mu .
Claim 5
Dependent Claim 33 words
An insulated gate type field effect semiconductor device according to claim 1, wherein one portion of the PN junction formed between said substrate and said second region is used as a protecting diOde.
Claim 6
Dependent Claim 175 words
An insulated gate type field effect transistor comprising a semiconductor substrate of a first conductivity type having a major surface; a source and a drain region of a second conductivity type opposite to the first conductivity type formed in the major surface of said substrate; an insulating film covering at least the major surface of said substrate between said source and drain regions; a gate electrode formed on said insulating film; an elongated semiconductor region of the second conductivity type formed in the major surface of said substrate; a PN junction defined between said semiconductor region and said substrate, said PN junction having a breakdown voltage lower than that of said insulating film under said gate electrode; first and second electrode contacts connected to the surface of said semiconductor region; conducting means for connecting said gate electrode to one of said electrode contacts; means for applying an input signal between said substrate and the other electrode contact, thereby the input signal is applied to said gate electrode through said semiconductor region and said conducting means.
Claim 7
Dependent Claim 175 words
An insulated gate type field effect transistor comprising a semiconductor substrate of a first conductivity type having a major surface; a source and a drain region of a second conductivity type opposite to the first conductivity type formed in the major surface of said substrate; an insulating film covering at least the major surface of said substrate between said source and drain regions; a gate electrode formed on said insulating film; an elongated semiconductor region of the second conductivity type formed in the major surface of said substrate; a PN junction defined between said semiconductor region and said substrate, said PN junction having a breakdown voltage lower than that of said insulating film under said gate electrode; first and second electrode contacts connected to the surface of said semiconductor region; conducting means for connecting said gate electrode to one of said electrode contacts; means for applying an input signal between said substrate and the other electrode contact, thereby the input signal is applied to said gate electrode through said semiconductor region and said conducting means.
Claim 8
Dependent Claim 73 words
An insulated gate type field effect transistor according to claim 5, wherein said substrate is composed of N type silicon, said source and drain regions and said elongated semiconductor region are composed of P type silicon, said insulating film under said gate electrode consists essentially of silicon oxide and has a thickness of not more than 1,500 A., and the depth of said elongated semiconductor region is not more than 2 Mu .
Claim 9
Dependent Claim 24 words
An insulated gate type field effect transistor according to claim 5, wherein said elongated semiconductor region is shallower than said source and drain regions.

References Cited (Backward Citations)

US3390314A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-08-20 1977-02-19 1977-08-21 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-08-20 1981-02-19 1981-08-21 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-08-20 1985-02-19 1985-08-21 $7700.00 Window Closed / Lapsed

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