Patent US4332839A successfully refreshed from Google Patents.
US4332839A
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Method for making integrated semiconductor circuit structure with formation of Ti or Ta silicide
Assignee: AT&T Inc
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Filing: 1981-01-22
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Granted: 1982-06-01
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Expires: 2001-01-22
Abstract
Abstract The compounds TiSi 2 and TaSi 2 have been found to be suitable substitutes for polysilicon layers in semiconductor integrated circuits. Suitable conducting properties of the compounds are ensured by providing a relatively thin substrate of polysilicon.
Inventors
- 👤 Hyman J. Levinstein
- 👤 Shyam P. Murarka
- 👤 Ashok K. Sinha
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 06:15
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/41; H10W20/44; H10W20/4451; H10D; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01306; H10D64/01308; H10D64/0131; H10D64/60; H10D64/66; H10D64/661; H10D64/662; H10D64/663; H10W20/01; H10W20/031; H10W20/064; H10W20/066; Y; Y10; Y10S; Y10S148/00; Y10S148/02; Y10S148/147
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
158 words
A method for making a semiconductor device from a wafer including a silicon epitaxial surface layer, said method comprising the steps of heating the wafer in an oxidizing atmosphere for a time and at a temperature for forming a first SiO 2 overlay, forming a first layer of doped polysilicon over said SiO 2 layer, depositing on said polysilicon layer a second layer of a material selected from the group consisting of Ti and Ta sintering the material of said second layer at a temperature and for a time to form a silicide TiSi 2 and TaSi 2 of the material, respectively, heating the wafer for a time and at a temperature to form a second SiO 2 overlay while leaving a layer of polysilicon in excess of 1000 Angstroms therebeneath, etching a pattern in said second SiO 2 overlay, depositing an electrically-conducting material over said second SiO 2 overlay, and etching a pattern in said electrically-conducting material.
Claim 2
Independent Claim
158 words
A method for making a semiconductor device from a wafer including a silicon epitaxial surface layer, said method comprising the steps of heating the wafer in an oxidizing atmosphere for a time and at a temperature for forming a first SiO 2 overlay, forming a first layer of doped polysilicon over said SiO 2 layer, depositing on said polysilicon layer a second layer of a material selected from the group consisting of Ti and Ta sintering the material of said second layer at a temperature and for a time to form a silicide TiSi 2 and TaSi 2 of the material, respectively, heating the wafer for a time and at a temperature to form a second SiO 2 overlay while leaving a layer of polysilicon in excess of 1000 Angstroms therebeneath, etching a pattern in said second SiO 2 overlay, depositing an electrically-conducting material over said second SiO 2 overlay, and etching a pattern in said electrically-conducting material.
Claim 3
Dependent Claim
28 words
A method in accordance with claim 1 in which said second layer comprises Ti and is sintered at about 900 degrees C. and heated in an oxygen atmosphere.
Claim 4
Dependent Claim
29 words
A method in accordance with claim 1 in which said second layer comprises Ta and is sintered at at least about 1000 degrees C. and is heated in steam.
References Cited (Backward Citations)
US4180596A
Cited
US4128670A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-05-31 | 1985-11-30 | 1986-06-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-05-31 | 1989-11-30 | 1990-06-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-05-31 | 1993-11-30 | 1994-06-01 | $7700.00 | Window Closed / Lapsed |