Patent US4331758A successfully refreshed from Google Patents.
US4331758A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Process for the preparation of large area TFT arrays
Assignee: Xerox Corp
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Filing: 1980-11-03
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Granted: 1982-05-25
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Expires: 2000-11-03
Abstract
Abstract Thin film transistor arrays are prepared by a vacuum deposition technique wherein only a single deposition of discrete areas of an insulating material are deposited through a mask. No registration is required to form the various elements of the transistors. A unique structure is described wherein the contact of the semiconductor material with the source electrode, the source bus conductors, and the drain electrode is coterminous with conductive material forming the source electrode and bus conductors and the drain electrode.
Inventors
- 👤 Fang C. Luo
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 17:47
CPC Classifications
H; H10; H10D; H10D86/00; H10D86/01; H10D86/021; H10D86/0231; H10D30/00; H10D30/60; H10D30/67; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6755; H10D86/40; H10D86/60
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
165 words
A method of preparing an array of thin film transistors which comprises, in vacuo, depositing onto a substrate a uniform layer of a semi-conducting material, depositing onto said semiconducting layer through a shadow mask, a plurality of discrete areas of an insulating material, depositing a uniform layer of a conducting material over the areas of insulating material and exposed portions of the semiconducting layer, removing the substrate containing the deposited layers from the vacuum, photolithographically forming a masking layer on said uniform layer of conducting material having a predetermined pattern of openings therein, removing the portions of the conducting material unprotected by the masking layer to thereby form the source, drain and source bus conductors of the array, removing the semiconducting material exposed by removal of the conducting material, removing the masking layer, depositing a uniform layer of insulating material over the thus-formed structure, and depositing in discrete areas a pattern of conductive material to form the gate and gate bus conductors of the array.
Claim 2
Independent Claim
165 words
A method of preparing an array of thin film transistors which comprises, in vacuo, depositing onto a substrate a uniform layer of a semi-conducting material, depositing onto said semiconducting layer through a shadow mask, a plurality of discrete areas of an insulating material, depositing a uniform layer of a conducting material over the areas of insulating material and exposed portions of the semiconducting layer, removing the substrate containing the deposited layers from the vacuum, photolithographically forming a masking layer on said uniform layer of conducting material having a predetermined pattern of openings therein, removing the portions of the conducting material unprotected by the masking layer to thereby form the source, drain and source bus conductors of the array, removing the semiconducting material exposed by removal of the conducting material, removing the masking layer, depositing a uniform layer of insulating material over the thus-formed structure, and depositing in discrete areas a pattern of conductive material to form the gate and gate bus conductors of the array.
Claim 3
Dependent Claim
34 words
The method of claim 1 wherein in vacuo, prior to the deposition of the uniform layer semiconducting material onto the substrate, the substrate is subject to a treating step to provide a new surface.
Claim 4
Dependent Claim
16 words
The method of claim 2 wherein the surface of the substrate is subjected to ion milling.
Claim 5
Dependent Claim
14 words
The method of claim 2 wherein the surface of the substrate is plasma etched.
Claim 6
Dependent Claim
34 words
The method of claim 1 wherein in vacuo, prior to the deposition of the uniform layer of semiconducting material onto the substrate, a uniform layer of an insulating material is deposited onto the substrate.
Claim 7
Dependent Claim
48 words
The method of claim 1 wherein in vacuo, prior to the deposition of the uniform layer of semiconducting material onto the substrate, a uniform layer of a conductive material is deposited onto the substrate and a uniform layer of an insulating material is deposited on the conductive material.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-05-24 | 1985-11-23 | 1986-05-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-05-24 | 1989-11-23 | 1990-05-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-05-24 | 1993-11-23 | 1994-05-25 | $7700.00 | Window Closed / Lapsed |