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US4319180A Expired / Lapsed US ⏱️ 0.0 years remaining

Reference voltage-generating circuit

Assignee: Toshiba Corp
•
Filing: 1980-06-13
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Granted: 1982-03-09
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Expires: 2000-06-13
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Abstract

Abstract A reference voltage circuit which generates a reference voltage having a good temperature characteristic as a drive voltage for a semiconductor integrated circuit, wherein a constant current source is connected to a power supply terminal; the output terminal of the constant current source is grounded through series-connected resistors; the junction of the series-connected resistors is connected to the bases of first and second NPN transistors; the first transistor has its collector connected to the constant current source, and its emitter grounded; the second transistor has its collector connected to the emitter of a third NPN transistor and its emitter grounded through a resistor; the third transistor has its base connected to the constant current source and its collector connected to the power supply terminal; and a reference voltage is sent forth from the emitter of the third transistor.

Inventors

  • 👤 Katsumi Nagano

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 04:25
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/22; G05F3/222; G05F3/225

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 188 words
A reference voltage-generating circuit which comprises: first and second power supply terminals (10, 18); a constant current source (12), one end of which is connected to the first power supply terminal (10); a voltage-dividing means (14, 16) connected between said constant current source (12) and second power supply terminal (18); a first transistor (20) whose base is connected to the voltage-dividing point of said voltage-dividing means (14, 16), whose collector is connected to the junction of said constant current source (12) and voltage-dividing means (14, 16), and whose emitter is connected to said second power supply terminal (18); a second transistor (22) whose base is connected to the base of said first transistor (20); a resistor means (26) which is connected between said second transistor (22) and second power supply terminal (18); a third transistor (24) whose base is connected to the collector of said first transistor (20), whose collector is connected to said first power supply terminal (10), and whose emitter is connected to the collector of said second transistor (22); and an output terminal (28) which is connected to the emitter of said third transistor (24).
Claim 2
Dependent Claim 188 words
A reference voltage-generating circuit which comprises: first and second power supply terminals (10, 18); a constant current source (12), one end of which is connected to the first power supply terminal (10); a voltage-dividing means (14, 16) connected between said constant current source (12) and second power supply terminal (18); a first transistor (20) whose base is connected to the voltage-dividing point of said voltage-dividing means (14, 16), whose collector is connected to the junction of said constant current source (12) and voltage-dividing means (14, 16), and whose emitter is connected to said second power supply terminal (18); a second transistor (22) whose base is connected to the base of said first transistor (20); a resistor means (26) which is connected between said second transistor (22) and second power supply terminal (18); a third transistor (24) whose base is connected to the collector of said first transistor (20), whose collector is connected to said first power supply terminal (10), and whose emitter is connected to the collector of said second transistor (22); and an output terminal (28) which is connected to the emitter of said third transistor (24).
Claim 3
Dependent Claim 41 words
The reference voltage-generating circuit according to claim 1, wherein said first power supply terminal (10) is impressed with positive voltage; said second power supply terminal (18) is supplied with negative voltage; and said first to third transistors are NPN type transistors.

References Cited (Backward Citations)

US3781648A Cited
US3875430A Cited
US4249091A Cited
US4221979A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1985-03-08 1985-09-07 1986-03-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1989-03-08 1989-09-07 1990-03-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1993-03-08 1993-09-07 1994-03-09 $7700.00 Window Closed / Lapsed

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