Current source biasing circuit

Claim 2

A current source comprising: a first field effect transistor connected to a first voltage supply terminal and a current output terminal, a second like field effect transistor having substantially the same threshold voltage as said first field effect transistor connected in series between first and second voltage supply terminals and biased to conduct in the exponential part of the current-voltage part of the transistor characteristic, a semiconductor junction coupling said second transistor to the gate of said first transistor, and means resistively coupling the gate of said first transistor to said second voltage supply terminal for establishing the gate voltage of said first transistor as the threshold voltage of said second transistor minus the semiconductor junction voltage, whereby the output current is little dependent upon threshold voltage.

Claim 3

The circuit of claim 1 further defined by said semiconductor junction comprising a semiconductor diode.

Claim 4

The circuit of claim 1 further defined by said semiconductor junction comprising one junction of a transistor in which said transistor is connected in series with a resistor across said first and second voltage supply terminals.

Claim 5

The circuit of claim 1 further defined by said transistors being P-channel MOSFETs with each having the sources connected to said first voltage supply terminal which is a positive voltage terminal.

Claim 6

The circuit of claim 4 further defined by a resistor connected in series with said second transistor for biasing such transistor.

Claim 7

The circuit of claim 5 further defined by said resistor comprising an N-channel MOSFET having a small width-to-length ratio and the gate thereof connected to said first voltage supply terminal.

Claim 8

The circuit of claim 4 further defined by: a first N-channel MOSFET connected between said current output terminal and said second negative voltage supply terminal with the gate thereof connected to the drain, and a second N-channel MOSFET connected between said second power supply terminal and a second current output terminal with the gate thereof connected to the gate of the first N-channel MOSFET to produce a stable current at said second output terminal referenced to negative power supply.

Claim 9

An integrated circuit MOS stable current source having first and second opposite polarity voltage supply terminals adapted for connection across a low voltage supply having an output subject to variation comprising: a first MOSFET device connected at source and drain between said first voltage supply terminal and a current output terminal, a second MOSFET device having substantially the same threshold voltage as said first MOSFET device connected at source and drain in series with a resistance between said first and second voltage supply terminals and having the gate thereof connected to the juncture of device and resistance, with said device being biased by said resistance to conduct in the exponential part of the device characteristic, said first and second devices having substantially the same threshold voltages, and a single semiconductor junction connected between the gate of said first device and the gate of said second device, whereby the gate voltage of said first device is substantially equal to the threshold voltage of the second device minus the semiconductor junction voltage to provide a stable output current at said output terminal having little dependency upon device threshold voltages.

Claim 10

An integrated circuit MOS stable current source having first and second opposite polarity voltage supply terminals adapted for connection across a low voltage supply having an output subject to variation comprising: a first MOSFET device connected at source and drain between said first voltage supply terminal and a current output terminal, a second MOSFET device having substantially the same threshold voltage as said first MOSFET device connected at source and drain in series with a resistance between said first and second voltage supply terminals and having the gate thereof connected to the juncture of device and resistance, with said device being biased by said resistance to conduct in the exponential part of the device characteristic, said first and second devices having substantially the same threshold voltages, and a single semiconductor junction connected between the gate of said first device and the gate of said second device, whereby the gate voltage of said first device is substantially equal to the threshold voltage of the second device minus the semiconductor junction voltage to provide a stable output current at said output terminal having little dependency upon device threshold voltages.