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US4313126A
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Field effect transistor
Assignee: Raytheon Co
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Filing: 1979-05-21
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Granted: 1982-01-26
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Expires: 1999-05-21
Abstract
Abstract A field effect transistor is provided wherein a semiconductor body has a source region and a plurality of drain regions with a gate region common to the plurality of drain regions. A common gate electrode is formed over the common gate region to control the flow of carriers to each one of the plurality of drain regions. With such arrangement an efficient multi-drain field effect transistor is provided through the use of a common gate electrode formed on the semiconductor body.
Inventors
- 👤 Charles F. Krumm
- 👤 Robert A. Pucel
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 08:05
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/20; H10D64/27; H10D64/311; H10D64/411; H10D30/00; H10D30/80; H10D30/87; H10D30/873; H10D62/00; H10D62/10; H10D62/13; H10D62/149; H10D62/161; H10D64/23; H10D64/251; H10D64/254
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
118 words
A field effect transistor, comprising: (a) a semiconductor; (b) a source electrode means in contact with such semiconductor for providing a source region for the transistor; (c) a plurality of separate, electrically independent drain electrode means in contact with such semiconductor for providing a plurality of separate electrically independent drain regions for the transistor; (d) a common gate electrode means for controlling a flow of carriers in the semiconductor between the source region and the plurality of separate, electrically independent, drain regions; and (e) a plurality of separate, electrically independent, electrode means, each one being adapted to control a flow of carriers in the semiconductor between a corresponding one of the separate drain regions and the source region.
Claim 2
Dependent Claim
118 words
A field effect transistor, comprising: (a) a semiconductor; (b) a source electrode means in contact with such semiconductor for providing a source region for the transistor; (c) a plurality of separate, electrically independent drain electrode means in contact with such semiconductor for providing a plurality of separate electrically independent drain regions for the transistor; (d) a common gate electrode means for controlling a flow of carriers in the semiconductor between the source region and the plurality of separate, electrically independent, drain regions; and (e) a plurality of separate, electrically independent, electrode means, each one being adapted to control a flow of carriers in the semiconductor between a corresponding one of the separate drain regions and the source region.
Claim 3
Dependent Claim
119 words
A semiconductor device comprising: (a) a semiconductor; (b) a plurality of separate, electrically independent electrode means in contact with the semiconductor for providing a plurality of separate, electrically independent first regions for the transistor; (c) electrode means in contact with the semiconductor for providing a second region for the transistor; (d) a common gate electrode means for controlling a flow of carriers in the semiconductor between the second region and each one of the plurality of separate first regions; and (e) a plurality of separate, electrically independent gate electrode means, each one thereof being adapted to control a flow of carriers in the semiconductor between the second region and a corresponding one of the plurality of separate first regions.
Claim 4
Dependent Claim
119 words
A semiconductor device comprising: (a) a semiconductor; (b) a plurality of separate, electrically independent electrode means in contact with the semiconductor for providing a plurality of separate, electrically independent first regions for the transistor; (c) electrode means in contact with the semiconductor for providing a second region for the transistor; (d) a common gate electrode means for controlling a flow of carriers in the semiconductor between the second region and each one of the plurality of separate first regions; and (e) a plurality of separate, electrically independent gate electrode means, each one thereof being adapted to control a flow of carriers in the semiconductor between the second region and a corresponding one of the plurality of separate first regions.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-01-25 | 1985-07-27 | 1986-01-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-01-25 | 1989-07-27 | 1990-01-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-01-25 | 1993-07-27 | 1994-01-26 | $7700.00 | Window Closed / Lapsed |