US4297596A
Expired / Lapsed
US
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Schmitt trigger
Assignee: Motorola Solutions Inc
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Filing: 1979-05-01
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Granted: 1981-10-27
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Expires: 1999-05-01
Abstract
Abstract A compensated Schmitt trigger includes first and second balanced current paths between V DD and ground for establishing the Schmitt trigger's low and high output respectively. The first path includes a first small enhancement device, a second depletion device and a third enhancement device. The second path includes a fourth enchancement device and said second and third devices. Thus, each path includes two enhancement devices and one depletion device. Process variations in each path will tend to track stabilizing the difference between the low and high switching voltages.
Inventors
- 👤 Kim Eckert
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 22:45
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/353; H03K3/356; H03K3/3565
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
170 words
A MOS Schmitt trigger circuit comprising: a first field effect transistor of the enhancement type and having a drain and a gate coupled to a first potential, and a source coupled to an output terminal; a second field effect transistor of the enhancement type and having a drain coupled to the source of the first transistor, a gate coupled to an input terminal, and a source; a third field effect transistor of the depletion type and having a drain coupled to the source of the second transistor, a gate, and a source; a fourth field effect transistor of the enhancement type and having a drain coupled to the gate and source of the third transistor, a gate coupled to the first potential, and a source coupled to a second potential; and a fifth field effect transistor of the enhancement type and having a drain coupled to the first potential, a gate coupled to the drain of the second transistor, and a source coupled to the drain of the third transistor.
Claim 2
Dependent Claim
170 words
A MOS Schmitt trigger circuit comprising: a first field effect transistor of the enhancement type and having a drain and a gate coupled to a first potential, and a source coupled to an output terminal; a second field effect transistor of the enhancement type and having a drain coupled to the source of the first transistor, a gate coupled to an input terminal, and a source; a third field effect transistor of the depletion type and having a drain coupled to the source of the second transistor, a gate, and a source; a fourth field effect transistor of the enhancement type and having a drain coupled to the gate and source of the third transistor, a gate coupled to the first potential, and a source coupled to a second potential; and a fifth field effect transistor of the enhancement type and having a drain coupled to the first potential, a gate coupled to the drain of the second transistor, and a source coupled to the drain of the third transistor.
Claim 3
Dependent Claim
20 words
A circuit according to claim 1 wherein said first, second, third, fourth and fifth transistors are N-channel field effect transistors.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1984-10-26 | 1985-04-27 | 1985-10-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1988-10-26 | 1989-04-27 | 1989-10-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1992-10-26 | 1993-04-27 | 1993-10-27 | $7700.00 | Window Closed / Lapsed |