Method of making post-metal programmable MOS read only memory

Claim 1

A method of making a read-only memory comprising the steps of: forming a plurality of insulated gate field effect transistors in a face of a semiconductor body, each of the transistors having a source, a drain and a gate, the transistors being in a regular pattern to provide an array of rows and columns of memory cells, the sources of all transistors in each column being integral with and connected in common to elongated column lines in said face, and drains of all transistors in each column being integral with and connected in common to elongated column lines in said face, the column lines including heavily-doped semiconductor material in said face, the gates of all transistors in each row being connected to a row line; the column lines running generally perpendicular to the row lines, one overlying the other; and thereafter programming the array of memory cells by masked ion implant penetrating through the gates and into the semiconductor body for selected ones of the field effect transistors but not through metal conductors on said face.

Claim 2

A method of making a read-only memory comprising the steps of: forming a plurality of insulated gate field effect transistors in a face of a semiconductor body, each of the transistors having a source, a drain and a gate, the transistors being in a regular pattern to provide an array of rows and columns of memory cells, the sources of all transistors in each column being integral with and connected in common to elongated column lines in said face, and drains of all transistors in each column being integral with and connected in common to elongated column lines in said face, the column lines including heavily-doped semiconductor material in said face, the gates of all transistors in each row being connected to a row line; the column lines running generally perpendicular to the row lines, one overlying the other; and thereafter programming the array of memory cells by masked ion implant penetrating through the gates and into the semiconductor body for selected ones of the field effect transistors but not through metal conductors on said face.

Claim 7

A method of making a read-only-memory comprising the steps of: forming a plurality of insulated gate field effect transistors in a face of a semiconductor body, each of the transistors having a source, a drain and a gate, the transistors being in a regular pattern of rows and columns to provide an array of memory cells, the sources of all transistors in each column being directly connected to elongated column lines at said face, the drains of all transistors in each column being directly connected to elongated column lines at said face, the column lines including elongated heavily-doped regions of semiconductor material in said face, the gates being connected to a row line for all transistors in a row; the column lines running generally perpendicular to the row lines; forming a plurality of other transistors and a plurality of contacts and interconnections on said face peripheral to the array; and programming the array of memory cells by ion implant through the gates and into the semiconductor body for selected ones of the field effect transistors using a mask applied after column lines are in place and after said contact and interconnections have been formed.

Claim 8

A method of making a read-only-memory comprising the steps of: forming a plurality of insulated gate field effect transistors in a face of a semiconductor body, each of the transistors having a source, a drain and a gate, the transistors being in a regular pattern of rows and columns to provide an array of memory cells, the sources of all transistors in each column being directly connected to elongated column lines at said face, the drains of all transistors in each column being directly connected to elongated column lines at said face, the column lines including elongated heavily-doped regions of semiconductor material in said face, the gates being connected to a row line for all transistors in a row; the column lines running generally perpendicular to the row lines; forming a plurality of other transistors and a plurality of contacts and interconnections on said face peripheral to the array; and programming the array of memory cells by ion implant through the gates and into the semiconductor body for selected ones of the field effect transistors using a mask applied after column lines are in place and after said contact and interconnections have been formed.

Claim 13

A method of making a semiconductor device comprising the steps of: forming a plurality of circuit elements in a face of a semiconductor body in a regular pattern of rows and columns, each of the circuit elements having electrodes in the face and a control electrode overlying the face; forming a plurality of parallel column conductor means at said face, each of said electrodes in the face being connected to a column conductor means for all elements in a column, the column conductor means including doped semiconductor material in the body integral with electrodes; forming a plurality of row lines at said face connecting said control electrodes for all elements in a row; and thereafter changing the characteristics of the circuit elements by ion implant through the control electrodes into the semiconductor body for selected ones of the circuit elements using a mask, said ion implant being done after said electrodes and column conductor means are formed.

Claim 14

A method of making a semiconductor device comprising the steps of: forming a plurality of circuit elements in a face of a semiconductor body in a regular pattern of rows and columns, each of the circuit elements having electrodes in the face and a control electrode overlying the face; forming a plurality of parallel column conductor means at said face, each of said electrodes in the face being connected to a column conductor means for all elements in a column, the column conductor means including doped semiconductor material in the body integral with electrodes; forming a plurality of row lines at said face connecting said control electrodes for all elements in a row; and thereafter changing the characteristics of the circuit elements by ion implant through the control electrodes into the semiconductor body for selected ones of the circuit elements using a mask, said ion implant being done after said electrodes and column conductor means are formed.

Claim 19

A method of making a semiconductor device comprising the steps of: forming a plurality of field effect transistors in a face of a semiconductor body, each transistor having source and drain heavily-doped regions in the face and a gate overlying the face insulated therefrom by a thin gate insulator, the source and drain regions underlying a field insulator much thicker than said gate insulator, a plurality of said heavily-doped regions being integrally connected together by conductive means including elongated heavily-doped regions in said face under said field insulator forming a common conductor line; and thereafter changing the characteristics of said field effect transistors by ion implant through selected ones of the gates and into the semiconductor body using a mask, after said conductor line is formed.

Claim 20

A method of making a semiconductor device comprising the steps of: forming a plurality of field effect transistors in a face of a semiconductor body, each transistor having source and drain heavily-doped regions in the face and a gate overlying the face insulated therefrom by a thin gate insulator, the source and drain regions underlying a field insulator much thicker than said gate insulator, a plurality of said heavily-doped regions being integrally connected together by conductive means including elongated heavily-doped regions in said face under said field insulator forming a common conductor line; and thereafter changing the characteristics of said field effect transistors by ion implant through selected ones of the gates and into the semiconductor body using a mask, after said conductor line is formed.