Patent US4288910A successfully refreshed from Google Patents.
US4288910A
Expired / Lapsed
US
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Method of manufacturing a semiconductor device
Assignee: AT&T Teletype Corp
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Filing: 1979-04-16
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Granted: 1981-09-15
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Expires: 1999-04-16
Abstract
Abstract A method of manufacturing devices in a semiconductor body 20 of a first conductivity type. An oxygen impervious masking medium 22 is placed on the body 20. Portions of the medium 22 are removed to define field areas 31 and field oxide is formed in the field areas. The surface of the silicon wafer 23 is thereafter masked to define gate areas 26 and electrical contact areas 30. The exposed medium is removed and the exposed body areas doped to form interconnect runs 28 and a source/drain region 29 of a second conductivity type. An oxide 48, 50 is formed over the doped interconnect runs and source/drain regions of the wafer. The masking medium covering the contact area 30 is removed and the contact area is doped to a second conductivity type. Finally conductors 60, 61 are positioned to provide the desired electrical connections. In a first alternate embodiment the masking medium is a sandwich of different material layers 70, 72 and in a second alternate embodiment the masking medium is a sandwich of three different layers 80, 82 and 84.
Inventors
- 👤 Richard H. Heeren
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 22:02
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/027; H10P; H10P14/00; H10P14/60; H10P14/61; H10P76/00; H10P76/40; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/0125; H10W10/0126; H10W10/10; H10W10/13
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
211 words
A method of manufacturing devices on a semiconductor wafer 23 of a first conductivity type having formed on the body 20 of the wafer 23 a masking medium 22, removing selected portions of the masking medium 22 to expose the surface of the body 20 thereby defining field regions 31 on the surface of the wafer and forming a field insulator 32, 34, 36, at the exposed locations on the surface of the body 20, wherein the improvement comprises the steps of: A. Removing selected portions of the remaining masking medium 22 so as to define source/drain regions 29 and interconnect runs 28 on the surface of the wafer 23, B. Doping the source/drain regions 29 and interconnect runs 28 to a second conductivity type 44, 46, C. Forming an insulator 48, 50 over the doped source/drain regions 29 and interconnect runs 28, D. Removing the masking medium 22 covering an electrical contact area 30, E. Doping the electrical contact area 30 to a second conductivity type 54, F. Preparing the gate and contact area 26, 30 for reception of electrical conductors 60, 61, and G. Placing electrical conductors 60, 61 at selected locations on the wafer 23 surface to provide electrical contact with the gate and contact area 26, 30.
Claim 2
Independent Claim
211 words
A method of manufacturing devices on a semiconductor wafer 23 of a first conductivity type having formed on the body 20 of the wafer 23 a masking medium 22, removing selected portions of the masking medium 22 to expose the surface of the body 20 thereby defining field regions 31 on the surface of the wafer and forming a field insulator 32, 34, 36, at the exposed locations on the surface of the body 20, wherein the improvement comprises the steps of: A. Removing selected portions of the remaining masking medium 22 so as to define source/drain regions 29 and interconnect runs 28 on the surface of the wafer 23, B. Doping the source/drain regions 29 and interconnect runs 28 to a second conductivity type 44, 46, C. Forming an insulator 48, 50 over the doped source/drain regions 29 and interconnect runs 28, D. Removing the masking medium 22 covering an electrical contact area 30, E. Doping the electrical contact area 30 to a second conductivity type 54, F. Preparing the gate and contact area 26, 30 for reception of electrical conductors 60, 61, and G. Placing electrical conductors 60, 61 at selected locations on the wafer 23 surface to provide electrical contact with the gate and contact area 26, 30.
Claim 3
Dependent Claim
37 words
The method of claim 1 wherein step (F) includes removing the masking medium 22 from the gate area 26 of the wafer 23, and covering the gate area 26 with a thin layer of gate dielectric 55.
Claim 4
Dependent Claim
35 words
The method of claim 2 wherein the doped second conductivity type material 54 at the contact area 30 is formed deeper within the body 20 of the wafer 23 than the doped source/drain regions 29.
Claim 5
Dependent Claim
65 words
The method of claim 1 wherein step (F) further includes removing the masking medium 22 from the gate area 26 of the wafer 23, and covering the entire surface of the wafer 23 with a gate dielectric and thereafter removing the gate dielectric from the contact area 30 prior to the formation of the electrical conductors 60, 61 on the surface of the wafer 23.
Claim 6
Dependent Claim
34 words
The method of claim 4 wherein the doped second conductivity type material 54 at the area 30 is formed deeper within the body 20 of the wafer 23 than the doped source/drain regions 29.
Claim 7
Dependent Claim
57 words
The method of claim 1 wherein said masking medium 22 over the surface of the wafer 23 comprises a sandwich including a layer of gate dielectric 70 placed adjacent the surface of the body 20 and an outer oxygen impervious layer 72 and step F includes removing the oxygen impervious layer 72 covering the gate area 26.
Claim 8
Dependent Claim
37 words
The method of claim 6 wherein the doped second conductivity type material 54 at the contact area 30 is formed deeper into the body 20 of the wafer 23 than the doped 44, 46 source/drain regions 29.
Claim 9
Dependent Claim
61 words
The method of claim 1 wherein said masking medium comprises a sandwich including a layer of gate dielectric 80 placed adjacent the surface of the body 20, a conductive layer 82 over the gate dielectric layer 80 and finally an outer oxygen impervious layer 84; and wherein step F includes removing the oxygen impervious layer 84 covering the gate area 26.
Claim 10
Dependent Claim
31 words
The method of claim 8 wherein the doped second conductivity type material 54 at the contact area 30 is formed deeper into the body 20 than the doped source/drain regions 29.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1984-09-14 | 1985-03-16 | 1985-09-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1988-09-14 | 1989-03-16 | 1989-09-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1992-09-14 | 1993-03-16 | 1993-09-15 | $7700.00 | Window Closed / Lapsed |