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US4287595A Expired / Lapsed US ⏱️ 0.0 years remaining

Adaptive delta-modulation network

Assignee: Tekade Felten and Guilleaume Fernmeldeanlagen GmbH
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Filing: 1979-10-29
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Granted: 1981-09-01
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Expires: 1999-10-29
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Abstract

Abstract In an adaptive delta modulation system, the delta modulated output signal is applied to a logic circuit which derives from such signal a pulse train used to develop the system's quantization step-size control voltage. The output pulse train of the logic circuit is applied to a circuit which serves the function of an integrator although digital in operation. The digital circuit develops a digital output signal whose value depends upon the number of pulses appearing per unit time in the logic circuit output pulse train. The digital circuit includes a forwards-backwards counter, whose forwards input receives the logic circuit output pulse train. An accumulator which accumulates the count on the counter produces carry pulses at its highest-place stage, the carry pulses having a repetition frequency corresponding to the count on the counter, the carry pulses being applied to the reverse input of the counter. The count on the counter corresponds to the number of pulses appearing per unit time in the logic circuit output pulse train and is applied to a digital-to-analog converter, from the analog output signal of which the quantization step-size control voltage is derived.

Inventors

  • 👤 Charles Meyers

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 08:26
CPC Classifications
H; H03; H03M; H03M3/00; H03M3/02; H03M3/022; H03M3/024

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 129 words
A circuit operative for developing a signal which is proportional to the number of pulses appearing per unit time in a pulse train, the circuit comprising a forwards-backwards counter having a forwards input and a backwards input, said forwards input of the counter receiving the pulses of a first pulse train; means responsive to the count on the counter and applying to said backwards input of the counter a second pulse train, the number of pulses contained in the second pulse train per unit time varying in proportion to the count on the counter; and digital-to-analog converter means receiving the count on the counter and converting the count into a corresponding analog signal whose value indicates the number of pulses appearing per unit time in the first pulse train.
Claim 2
Dependent Claim 129 words
A circuit operative for developing a signal which is proportional to the number of pulses appearing per unit time in a pulse train, the circuit comprising a forwards-backwards counter having a forwards input and a backwards input, said forwards input of the counter receiving the pulses of a first pulse train; means responsive to the count on the counter and applying to said backwards input of the counter a second pulse train, the number of pulses contained in the second pulse train per unit time varying in proportion to the count on the counter; and digital-to-analog converter means receiving the count on the counter and converting the count into a corresponding analog signal whose value indicates the number of pulses appearing per unit time in the first pulse train.
Claim 3
Dependent Claim 33 words
The circuit defined in claim 1, said means applying the second pulse train comprising an accumulator which accumulates the count on the counter and produces carry pulses which form the second pulse train.
Claim 4
Dependent Claim 50 words
The circuit defined in claim 1, furthermore including means operative in dependence upon the count on the counter for automatically disabling one or more lowest-place stages of the counter so as to increase the numerical value by which the count changes in response to each pulse received by the counter.
Claim 5
Dependent Claim 54 words
The circuit defined in claim 2, the counter having a number of stages exceeding by one the number of stages of the accumulator, furthermore including means responding to pulses produced at the highest-place stage of the counter by preventing the counter from changing count in response to the pulses of the first pulse train.
Claim 6
Dependent Claim 38 words
The circuit defined in claim 2, furthermore including means responding to the count on the counter reaching a predetermined maximum value by preventing the counter from changing count in response to the pulses of the first pulse train.
Claim 7
Dependent Claim 115 words
In an adaptive delta modulation system of the type which produces a delta-modulated output signal and which includes means varying the quantization step size of the system as a function of a received control voltage and which also includes logic circuit means receiving the delta-modulated output signal and operative for deriving therefrom a pulse train used to develop the control voltage, an arrangement for deriving the control voltage from the pulse train, the arrangement comprising digital circuit means receiving the pulse train and producing a digital output signal whose value corresponds to the number of pulses appearing per unit time in the pulse train, and means deriving the control voltage from the digital output signal.
Claim 8
Dependent Claim 115 words
In an adaptive delta modulation system of the type which produces a delta-modulated output signal and which includes means varying the quantization step size of the system as a function of a received control voltage and which also includes logic circuit means receiving the delta-modulated output signal and operative for deriving therefrom a pulse train used to develop the control voltage, an arrangement for deriving the control voltage from the pulse train, the arrangement comprising digital circuit means receiving the pulse train and producing a digital output signal whose value corresponds to the number of pulses appearing per unit time in the pulse train, and means deriving the control voltage from the digital output signal.
Claim 9
Dependent Claim 35 words
In an adaptive delta modulation system as defined in claim 6, the digital circuit means including counting means generating a count dependent upon the number of pulses appearing per unit time in the pulse train.
Claim 10
Dependent Claim 115 words
In an adaptive delta modulation system as defined in claim 6, the digital circuit means including a forwards-backwards counter having a forwards input and a backwards input, said forwards input of the counter receiving said pulse train, said pulse train being a first pulse train; and means responsive to the count on the counter and operative for applying to said backwards input of the counter a second pulse train, the number of pulses contained in the second pulse train per unit time varying in proportion to the count on the counter, said means for deriving the control voltage including digital-to-analog converter means receiving the count on the counter and deriving therefrom a corresponding analog signal.
Claim 11
Dependent Claim 35 words
In a system as defined in claim 8, said means applying the second pulse train comprising an accumulator which accumulates the count on the counter and produces carry pulses which form the second pulse train.
Claim 12
Dependent Claim 52 words
In a system as defined in claim 8, furthermore including means operative in dependence upon the count on the counter for automatically disabling one or more lowest-place stages of the counter so as to increase the numerical value by which the count changes in response to each pulse received by the counter.
Claim 13
Dependent Claim 56 words
In a system as defined in claim 9, the counter having a number of stages exceeding by one the number of stages of the accumulator, furthermore including means responding to pulses produced at the highest-place stage of the counter by preventing the counter from changing count in response to the pulses of the first pulse train.
Claim 14
Dependent Claim 39 words
In a system as defined in claim 9, furthermore including means responding to the count on the counter reaching a predetermined maximum value by preventing the counter from changing count in response to the pulses of the first pulsetrain.

References Cited (Backward Citations)

US3638219A Cited
US3822404A Cited
US3781685A Cited
US4110705A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1984-08-31 1985-03-02 1985-09-01 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1988-08-31 1989-03-02 1989-09-01 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1992-08-31 1993-03-02 1993-09-01 $7700.00 Window Closed / Lapsed

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