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Patent US4276516A successfully refreshed from Google Patents.
US4276516A
Expired / Lapsed
US
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Thermal stress reduction in IC power transistors
Assignee: National Semiconductor Corp
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Filing: 1979-07-26
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Granted: 1981-06-30
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Expires: 1999-07-26
Abstract
Abstract In an integrated circuit class B audio output device the transistors are fabricated as plural parallel connected sections. The two output transistors have their sections interdigitated so that adjacent sections are not turned on simultaneously. This leads to substantial improvements in thermal peaks within the transistors and to reduced thermal gradients across the transistors.
Inventors
- 👤 James S. Congdon
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 19:43
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/20; H03F3/21; H03F3/213; H03F1/00; H03F1/30; H03F1/307
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
95 words
In an integrated circuit designed for high power operation and including at least first and second output transistors, said output transistors operating to account for most of the power dissipation in said circuit and biased so that said first and second output transistors do not dissipate their peak power simultaneously but on an alternating basis, the improvement comprising: fabricating said first and second output transistors each in the form of a plurality of isolated electrically interconnected sections; and interdigitating said sections so that adjacent sections represent respectively elements of said first and second output transistors.
Claim 2
Dependent Claim
95 words
In an integrated circuit designed for high power operation and including at least first and second output transistors, said output transistors operating to account for most of the power dissipation in said circuit and biased so that said first and second output transistors do not dissipate their peak power simultaneously but on an alternating basis, the improvement comprising: fabricating said first and second output transistors each in the form of a plurality of isolated electrically interconnected sections; and interdigitating said sections so that adjacent sections represent respectively elements of said first and second output transistors.
Claim 3
Dependent Claim
39 words
The improvement of claim 1 wherein said integrated circuit is of monolithic construction, said first and second output transistors are created in one face thereof, and the second face is in intimate heat exchange relationship with a heat sink.
Claim 4
Dependent Claim
44 words
The improvement of claim 2 wherein said sections each comprise common base and collector regions with a plurality of separate emitter elements distributed within said common base region and said separate emitter elements each including a series resistance coupled to a common emitter connection.
Claim 5
Dependent Claim
24 words
The improvement of claim 3 in which said first and second output transistors are connected and biased to produce a class B output stage.
Claim 6
Dependent Claim
87 words
An integrated circuit including a power output stage comprising: a semiconductor substrate; means for securing one face of said substrate in heat exchange relationship with means for heat sinking; first and second power transistors fabricated into the opposite face of said substrate, each of said first and second transistors being composed of a plurality of individual sections interdigitated so that no two adjacent sections are part of one of said first and second power transistors; and means for interconnecting said sections into a power output stage configuration.
Claim 7
Dependent Claim
87 words
An integrated circuit including a power output stage comprising: a semiconductor substrate; means for securing one face of said substrate in heat exchange relationship with means for heat sinking; first and second power transistors fabricated into the opposite face of said substrate, each of said first and second transistors being composed of a plurality of individual sections interdigitated so that no two adjacent sections are part of one of said first and second power transistors; and means for interconnecting said sections into a power output stage configuration.
Claim 8
Dependent Claim
19 words
The circuit of claim 5 further including means for biasing said first and second transistors for class B operation.
Claim 9
Dependent Claim
26 words
The circuit of claim 5 wherein said first transistor comprises a first pair of sections interdigitated between a second pair of sections comprising said second transistor.
Claim 10
Dependent Claim
13 words
The circuit of claim 7 wherein said sections are of elongated rectangular form.
Claim 11
Dependent Claim
29 words
The circuit of claim 7 wherein said sections are substantially square and are arrayed to form a substantially square combination in which each transistor has its sections arrayed diagonally.
Claim 12
Dependent Claim
17 words
The circuit of claim 5 wherein said first and second transistors are of plural ballasted emitter construction.
References Cited (Backward Citations)
US3631357A
Cited
US3729660A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1984-06-29 | 1984-12-29 | 1985-06-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1988-06-29 | 1988-12-29 | 1989-06-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1992-06-29 | 1992-12-29 | 1993-06-30 | $7700.00 | Window Closed / Lapsed |