Amplifier

Claim 2

A driver amplifier system for a push-pull power amplifier, comprising: a preamplifier; a pair of driver transistors arranged in complementary symmetry circuit, each of said transistors having a base, emitter and collector electrodes, said transistors receiving the electrical signal output of said preamplifier as electrical signal input to their base electrodes; and variable biasing means in the base-emitter circuit of each of said driver transistors, said biasing means being empirically adjusted for establishing the optimum combination of conduction angle of each transistor and degree of conduction angle overlap of both of said driver transistors to generate driving signals for said push-pull power ampLifier having minimum signal distortion, said conduction angle overlap being substantially between 25* and 60*.

Claim 3

A driver amplifier system as set forth in claim 1, wherein said biasing means includes a resistive voltage divider network.

Claim 4

An amplifier system, comprising: a preamplifier stage having a single-ended electrical output; an NPN-driver transistor and a PNP-driver transistor electrically connected in a complementary symmetry circuit, each of said transistors having a base, emitter and collector electrodes, said driver transistors receiving the single-ended output of said preamplifier stage as a common driving input to their base electrodes; variable biasing means in the base-emitter circuit of each of said driver transistors for establishing the optimum combination of conduction angle of each transistor and degree of conduction angle overlap between said driver transistors, at least one of said biasing means being empirically adjusted to establish minimum signal distortion of said electrical outputs of said driver transistors, said conduction angle overlap being substantially between 25* and 60*; a pair of complementary symmetry power amplifier stages, each of said stages being adapted to receive as electrical input said electrical output of one of said driver transistors; and means responsive to the electrical output of each of said power amplifier stages for controlling said biasing means to vary said combination of conduction angle of each of said driver transistors and the degree of conduction angle overlap of said driver transistors to selectively limit said driving input to said base electrodes of said driver transistors.

Claim 5

An amplifier system, comprising: a preamplifier stage having a single-ended electrical output; an NPN-driver transistor and a PNP-driver transistor electrically connected in a complementary symmetry circuit, each of said transistors having a base, emitter and collector electrodes, said driver transistors receiving the single-ended output of said preamplifier stage as a common driving input to their base electrodes; variable biasing means in the base-emitter circuit of each of said driver transistors for establishing the optimum combination of conduction angle of each transistor and degree of conduction angle overlap between said driver transistors, at least one of said biasing means being empirically adjusted to establish minimum signal distortion of said electrical outputs of said driver transistors, said conduction angle overlap being substantially between 25* and 60*; a pair of complementary symmetry power amplifier stages, each of said stages being adapted to receive as electrical input said electrical output of one of said driver transistors; and means responsive to the electrical output of each of said power amplifier stages for controlling said biasing means to vary said combination of conduction angle of each of said driver transistors and the degree of conduction angle overlap of said driver transistors to selectively limit said driving input to said base electrodes of said driver transistors.

Claim 6

An amplifier system as set forth in claim 3, and further including: thermal compensation means electrically connected between the output of said power amplifier stages and said driver transistors for stabilizing the quiescent operating conditions of said amplifier system over a wide range of temperature variation.

Claim 7

An amplifier system as set forth in claim 4, wherein each of said biasing means includes a voltage divider network.

Claim 8

A driver amplifier system as set forth in claim 1, and further including: means for temperature stabilizing the quiescent operating conditions of said transistors.

Claim 9

An amplifier system, comprising: a preamplifier; a pair of driver transistors having base, emitter, and collector electrodes, said transistors being arranged in a complementary symmetry circuit with said bases of said transistors receiving the electrical signal inputs to said preamplifier as electrical signal inputs to said transistors, said complementary symmetry circuit having a pair of complementary signal outputs; biasing means in the base-emitter circuit of each of said driver transistors, each of said biasing means being independently variable to adjust the combination of conduction angle of each of said driver transistors and degree of conduction angle overlap of both of said transistors to empirically establish minimum signal distortion of said complementary signal outputs, said conduction angle overlap being substantially between 25* and 60*; and a pair of complementary symmetry power amplification stages, said stages receiving as their electrical input said complementary signal outputs.

Claim 10

An amplifier system, comprising: a preamplifier; a pair of driver transistors having base, emitter, and collector electrodes, said transistors being arranged in a complementary symmetry circuit with said bases of said transistors receiving the electrical signal inputs to said preamplifier as electrical signal inputs to said transistors, said complementary symmetry circuit having a pair of complementary signal outputs; biasing means in the base-emitter circuit of each of said driver transistors, each of said biasing means being independently variable to adjust the combination of conduction angle of each of said driver transistors and degree of conduction angle overlap of both of said transistors to empirically establish minimum signal distortion of said complementary signal outputs, said conduction angle overlap being substantially between 25* and 60*; and a pair of complementary symmetry power amplification stages, said stages receiving as their electrical input said complementary signal outputs.

Claim 11

An amplifier system as set forth in claim 7 and further including: means responsive to the electrical output of said power amplification stages for varying said biasing means to vary said combination of conduction angle of each of said driver transistors and the degree of conduction angle overlap of said driver transistors to selectively limit said electrical signal inputs to said base electrodes of said transistors.

Claim 12

An amplifier system as set forth in claim 7, and further including: means responsive to the electrical output of said power amplification stages for temperature stabilizing the Quiescent operating conditions of said amplifier system.

Claim 13

An amplifier system, comprising: a preamplifier stage having a single-ended electrical output, said preamplifier stage including an operational amplifier; an NPN-driver transistor and a PNP-driver transistor electrically connected in a complementary symmetry circuit, each of said transistors having a base, emitter, and collector electrodes, said driver transistors receiving the single-ended output of said preamplifier stage as a common driving input to their base electrodes; biasing means including a voltage divider network in the base-emitter circuit of each of said driver transistors for establishing the conduction angle of each transistor and the optimum degree of conduction angle overlap between said driver transistors for minimum signal distortion; a pair of complementary symmetry power amplifier stages, each of said stages being adapted to receive as electrical input the electrical output of one of said driver transistors; means responsive to the electrical output of each of said power amplifier stages for controlling said biasing means to selectively limit said driving input to said base electrodes of said driver transistors, said responsive means including a PNP-transistor having its emitter-collector circuit in the base-emitter circuit of said NPN-driver transistor; and thermal compensation means electrically connected between the output of said power amplifier stages and said driver transistors for stabilizing the quiescent operating conditions of said amplifier system over a wide range of temperature variation.

Claim 14

An amplifier system, comprising: a preamplifier stage having a single-ended electrical output, said preamplifier stage including an operational amplifier; an NPN-driver transistor and a PNP-driver transistor electrically connected in a complementary symmetry circuit, each of said transistors having a base, emitter, and collector electrodes, said driver transistors receiving the single-ended output of said preamplifier stage as a common driving input to their base electrodes; biasing means including a voltage divider network in the base-emitter circuit of each of said driver transistors for establishing the conduction angle of each transistor and the optimum degree of conduction angle overlap between said driver transistors for minimum signal distortion; a pair of complementary symmetry power amplifier stages, each of said stages being adapted to receive as electrical input the electrical output of one of said driver transistors; means responsive to the electrical output of each of said power amplifier stages for controlling said biasing means to selectively limit said driving input to said base electrodes of said driver transistors, said responsive means including a PNP-transistor having its emitter-collector circuit in the base-emitter circuit of said NPN-driver transistor; and thermal compensation means electrically connected between the output of said power amplifier stages and said driver transistors for stabilizing the quiescent operating conditions of said amplifier system over a wide range of temperature variation.

Claim 15

An amplifier system as set forth in claim 10, wherein one of said complementary symmetry power amplifier stages includes a pair of NPN-power transistors connected in parallel, and the other of said power amplifier stages includes a pair of PNP-power transistors connected in parallel.