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US4271332A
Expired / Lapsed
US
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Speech signal A/D converter using an instantaneously-variable bandwidth filter
Assignee: Individual
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Filing: 1979-06-04
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Granted: 1981-06-02
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Expires: 1999-06-04
Abstract
Abstract In a preferred embodiment of the invention the audio signal is bandwidth limited before being differentiated to provide either a positive or negative signal (depending on the slope of the audio signal) to a comparator which provides a corresponding logical one or zero at its output. A digital logic circuit connected to the comparator output is clocked to provide a digital output signal transition from a logical one to a zero or vice versa if its input has changed from a logical one to a zero or vice versa at least once during the clock period. The clocked digital output of the logic circuit is provided as an input to a computer where it is stored. The digital data is subsequently read out of the computer and provided to a filter and integrator to provide an audio signal replica of the filtered input audio signal.
Inventors
- 👤 James C. Anderson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 13:41
CPC Classifications
G; G10; G10L; G10L19/00
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
118 words
An audio signal digitization circuit comprising: means for instantaneously limiting the bandwidth of said audio signal to provide a greater bandwidth for audio signals above a predetermined amplitude, first means for providing a signal whose logic level is responsive to the polarity of the slope of the output signal from said bandwidth limiting means, a source of clock signals, second means for providing an approximate digital output signal whose logic level changes in response to said logic level signal from said first means and to a clock signal from said source where said first means for providing a signal provides one or more changes in logic level to said second means in the period between said clock signals.
Claim 2
Dependent Claim
118 words
An audio signal digitization circuit comprising: means for instantaneously limiting the bandwidth of said audio signal to provide a greater bandwidth for audio signals above a predetermined amplitude, first means for providing a signal whose logic level is responsive to the polarity of the slope of the output signal from said bandwidth limiting means, a source of clock signals, second means for providing an approximate digital output signal whose logic level changes in response to said logic level signal from said first means and to a clock signal from said source where said first means for providing a signal provides one or more changes in logic level to said second means in the period between said clock signals.
Claim 3
Dependent Claim
70 words
The audio signal digitization circuit of claim 1 comprising in addition storage means responsive to said digital output signal and said clock signals to store the logic level of said digital output signal corresponding to its value during each period of the clock signal, means for reading out from said storage means said stored logic levels of said digital output signal to provide a replica of said digital input signal.
Claim 4
Dependent Claim
39 words
The audio signal reproduction circuit comprising the digitization circuit of claim 1 and in addition means for low-pass filtering said digital output signal, means for integrating said filtered digital output signal to provide a replica of the audio signal.
Claim 5
Dependent Claim
39 words
The audio signal reproduction circuit comprising the digitization circuit of claim 2 and in addition means for low-pass filtering said digital output signal, means for integrating said filtered digital output signal to provide a replica of the audio signal.
Claim 6
Dependent Claim
41 words
The audio signal digitization circuit of claims 1 or 2 wherein said bandwidth limiting means comprises a low-pass filter, an instantaneously-variable bandwidth filter in cascade with said low-pass filter and whose bandwidth is responsive to the amplitude of the audio signal.
Claim 7
Dependent Claim
112 words
The audio signal digitization circuit of claims 1 or 2 wherein said first means for providing a signal whose logic level is responsive to the slope of the output signal from said bandwidth limiting means comprises, a differentiator connected to the output of said bandwidth limiting means to provide a signal output having a positive or negative polarity in accordance with the slope of the input signal to said differentiator, a comparator responsive to the output signal of said differentiator to provide a digital signal output of one logic level for a positive polarity differentiator output signal and an output of a different logic level for a negative polarity differentiator output signal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1984-06-01 | 1984-12-01 | 1985-06-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1988-06-01 | 1988-12-01 | 1989-06-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1992-06-01 | 1992-12-01 | 1993-06-02 | $7700.00 | Window Closed / Lapsed |