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US4261772A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for forming voltage-invariant capacitors for MOS type integrated circuit device utilizing oxidation and reflow techniques

Assignee: American Microsystems Holding Corp
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Filing: 1979-07-06
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Granted: 1981-04-14
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Expires: 1999-07-06
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Abstract

Abstract For an integrated circuit semiconductor device having a multiplicity of MOSFET elements, voltage-invariant capacitors, each with metal as one plate and either polysilicon or source-drain diffusion as the second plate, are created by regrowing a thin oxide layer to provide the dielectric of the capacitor during the normal MOSFET processing sequence.

Inventors

  • 👤 Edward R. Lane

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 01:07
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/60; H10D1/68; H10D88/00; Y; Y10; Y10S; Y10S438/00; Y10S438/981

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 188 words
A method for fabricating a semiconductor device having MOS transistors and voltage invariant capacitors comprising the steps of: forming on a silicon substrate, pairs of preselected diffused regions having the opposite conductivity from that of said substrate and field oxide regions adjacent said diffused regions; forming a layer of conductive material in gate areas between diffused regions of said pairs and in preselected areas on said field oxide regions; covering said substrate, including said diffused regions, said areas of conductive material and said field oxide, with a layer of phosphorous doped oxide; forming openings in said layer of phosphorous doped oxide, including contact areas, aligned with preselected diffused regions and also, preselected capacitor areas of said layer of conductive material on said field oxide; reflowing said phosphorous doped oxide by heating in an oxygen ambient to reduce sharp edges at said openings and simultaneously grow a thin oxide layer in said contact and capacitor areas; removing the thin oxide layer in said contact areas; providing a layer of metal in said contact areas and also in said capacitor areas, thereby forming the upper conductor plate of the capacitor.
Claim 2
Independent Claim 188 words
A method for fabricating a semiconductor device having MOS transistors and voltage invariant capacitors comprising the steps of: forming on a silicon substrate, pairs of preselected diffused regions having the opposite conductivity from that of said substrate and field oxide regions adjacent said diffused regions; forming a layer of conductive material in gate areas between diffused regions of said pairs and in preselected areas on said field oxide regions; covering said substrate, including said diffused regions, said areas of conductive material and said field oxide, with a layer of phosphorous doped oxide; forming openings in said layer of phosphorous doped oxide, including contact areas, aligned with preselected diffused regions and also, preselected capacitor areas of said layer of conductive material on said field oxide; reflowing said phosphorous doped oxide by heating in an oxygen ambient to reduce sharp edges at said openings and simultaneously grow a thin oxide layer in said contact and capacitor areas; removing the thin oxide layer in said contact areas; providing a layer of metal in said contact areas and also in said capacitor areas, thereby forming the upper conductor plate of the capacitor.
Claim 3
Dependent Claim 20 words
The method as described in claim 1, wherein said thin oxide layer is formed to a thickness between 650-750 A.
Claim 4
Dependent Claim 27 words
The method as described in claim 1, wherein said layer of conductive material is polycrystalline silicon, having a thickness in the range of 3500 to 4500 A.
Claim 5
Dependent Claim 50 words
The method as described in claim 1, wherein the removal of the thin oxide layer in said contact areas is accomplished with a mask having openings for the contact areas that are slightly larger than the openings in the mask for originally forming the openings in the phosphorous doped oxide.

References Cited (Backward Citations)

US3860836A Cited
US3893146A Cited
US3986903A Cited
US4035820A Cited
US4055444A Cited
US4125933A Cited
US4110776A Cited
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US4204894A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1984-04-13 1984-10-13 1985-04-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1988-04-13 1988-10-13 1989-04-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1992-04-13 1992-10-13 1993-04-14 $7700.00 Window Closed / Lapsed

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