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US4255210A
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Method for manufacturing a read-only memory device
Assignee: NEC Corp
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Filing: 1979-03-12
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Granted: 1981-03-10
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Expires: 1999-03-12
Abstract
Abstract A read only-memory (ROM) is manufactured by a process which produces memories having customized codes from partially completed semiconductor chips. The chips are manufactured to a step where a matrix of apertures or windows are formed in an oxide layer at every cross point of every potential code. Then, a silicon dioxide film is formed over the entire surface of the chip including the window apertures. At this stage, the chip is stored as a general purpose stock item. When an order is received to prepare a ROM chip with customized codes, a mask is formed to etch and reopen the apertures or windows in the dioxide film at the encoded cross points. Then, suitable contact material is deposited over the surface of the chip, thereby completing a contact at each of the reopened apertures or windows. As a result, the normal lead time required for a manufacturer to make a customized ROM is reduced from, say, 4.5 to 6 days to a period of approximately 1.5 to 2 days.
Inventors
- 👤 Yasushi Okuyama
- 👤 Tsuyoshi Suzuki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 22:07
CPC Classifications
G; G11; G11C; G11C17/00; G11C17/08; G11C17/10; G11C17/12; H; H10; H10B; H10B20/00; H10W; H10W20/00; H10W20/40; H10W20/49
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
159 words
A method of manufacturing a read-only memory comprising the steps of: providing a semiconductor substrate of one conductivity type, said substrate having a thick field insulator formed selectively on a major surface thereof, and a plurality of impurity regions of the opposite conductivity type formed in the major surface thereof; forming a first insulating film on said thick field insulator and on the surface of said impurity regions; providing a plurality of first apertures in said first insulating film by means of a first mask to expose the surface portions of all of said impurity regions; forming a second insulating film on said first insulating film and within said first apertures to cover the exposed surface portions of said impurity regions; and providing second apertures in said second insulating film within only some selected ones of said first apertures by means of a second mask to expose the impurity regions in surface portions of only some selected first apertures.
Claim 2
Independent Claim
159 words
A method of manufacturing a read-only memory comprising the steps of: providing a semiconductor substrate of one conductivity type, said substrate having a thick field insulator formed selectively on a major surface thereof, and a plurality of impurity regions of the opposite conductivity type formed in the major surface thereof; forming a first insulating film on said thick field insulator and on the surface of said impurity regions; providing a plurality of first apertures in said first insulating film by means of a first mask to expose the surface portions of all of said impurity regions; forming a second insulating film on said first insulating film and within said first apertures to cover the exposed surface portions of said impurity regions; and providing second apertures in said second insulating film within only some selected ones of said first apertures by means of a second mask to expose the impurity regions in surface portions of only some selected first apertures.
Claim 3
Dependent Claim
31 words
A method of manufacturing a read-only memory of claim 1, in which said first insulating film includes a glass film, and said second insulating film includes a deposited silicon dioxide film.
Claim 4
Independent Claim
117 words
A method of manufacturing a read-only memory comprising the steps of: providing a semiconductor substrate of one conductivity type having a thick field insulator formed selectively on a major surface thereof; forming a plurality of impurity regions of the opposite conductivity type in the major surface of said substrate; forming a glass film on the surface of said plurality of impurity regions; providing a plurality of first apertures in said glass film to expose a surface of each of said impurity regions; covering said first apertures with a silicon dioxide film, and selectively exposing the surfaces of only some selected ones of said impurity regions, the surfaces of unselected impurity regions remaining covered by said glass film.
Claim 5
Independent Claim
117 words
A method of manufacturing a read-only memory comprising the steps of: providing a semiconductor substrate of one conductivity type having a thick field insulator formed selectively on a major surface thereof; forming a plurality of impurity regions of the opposite conductivity type in the major surface of said substrate; forming a glass film on the surface of said plurality of impurity regions; providing a plurality of first apertures in said glass film to expose a surface of each of said impurity regions; covering said first apertures with a silicon dioxide film, and selectively exposing the surfaces of only some selected ones of said impurity regions, the surfaces of unselected impurity regions remaining covered by said glass film.
Claim 6
Independent Claim
238 words
A method of manufacturing a read-only memory comprising the steps of: providing a semiconductor substrate of one conductivity type, said substrate having a thick field insulator selectively formed on a major surface thereof, a plurality of source regions of the opposite conductivity type formed in the major surface and extending in one direction, a plurality of drain regions of the opposite conductivity type formed in the major surface and arranged in a matrix form, a plurality of channel regions positioned between each of said drain regions and each part of said source regions; a plurality of gate insulator films formed on said channel regions, and a plurality of gate electrodes extending in said one direction over said gate insulator films and over said thick field insulator; forming a first insulating film on said thick field insulator, on the surface of said source regions, and on the surface of said drain regions; providing a plurality of first apertures in said first insulating film by means of a first mask to expose the surface portions of all of said drain regions; forming a second insulating film to cover said first apertures; providing second apertures in said second insulating film within only some selected ones of said first apertures by means of a second mask to expose the surface portions of selected drain regions; and electrically connecting a wiring layer on to the exposed surface of only said selected drain regions.
Claim 7
Independent Claim
238 words
A method of manufacturing a read-only memory comprising the steps of: providing a semiconductor substrate of one conductivity type, said substrate having a thick field insulator selectively formed on a major surface thereof, a plurality of source regions of the opposite conductivity type formed in the major surface and extending in one direction, a plurality of drain regions of the opposite conductivity type formed in the major surface and arranged in a matrix form, a plurality of channel regions positioned between each of said drain regions and each part of said source regions; a plurality of gate insulator films formed on said channel regions, and a plurality of gate electrodes extending in said one direction over said gate insulator films and over said thick field insulator; forming a first insulating film on said thick field insulator, on the surface of said source regions, and on the surface of said drain regions; providing a plurality of first apertures in said first insulating film by means of a first mask to expose the surface portions of all of said drain regions; forming a second insulating film to cover said first apertures; providing second apertures in said second insulating film within only some selected ones of said first apertures by means of a second mask to expose the surface portions of selected drain regions; and electrically connecting a wiring layer on to the exposed surface of only said selected drain regions.
Claim 8
Independent Claim
247 words
A method of manufacturing a read-only memory comprising the steps of: providing a semiconductor substrate of one conductivity type, said substrate having a plurality of active regions abutting against a thick field insulator selectively formed on a major surface thereof, a plurality of channel regions positioned in said active regions, a plurality of gate insulators formed on said channel regions, and a plurality of gate electrodes made of polycrystalline silicon extending in one direction over said gate insulator films and over said thick field insulator; forming a plurality of source and drain regions of the opposite conductivity type in said active regions so that a plurality of memory cells are provided in a matrix form; forming a first insulating film over said source and drain regions, over said gate electrode and over said thick field insulator; providing a plurality of first apertures in said first insulating film by means of a first mask to expose the surface portions of all said drain regions; forming a second insulating film to cover said first apertures; providing second apertures in said second insulating film within selected ones of said first apertures by means of a second mask to expose the surface portions of selected drain regions, with the surface portions of non-selected drain regions being covered by said second insulating film; and forming a plurality of wiring layers on said second insulating film, electrically connected to said selected drain regions and extending in a direction perpendicular to said one direction.
Claim 9
Independent Claim
247 words
A method of manufacturing a read-only memory comprising the steps of: providing a semiconductor substrate of one conductivity type, said substrate having a plurality of active regions abutting against a thick field insulator selectively formed on a major surface thereof, a plurality of channel regions positioned in said active regions, a plurality of gate insulators formed on said channel regions, and a plurality of gate electrodes made of polycrystalline silicon extending in one direction over said gate insulator films and over said thick field insulator; forming a plurality of source and drain regions of the opposite conductivity type in said active regions so that a plurality of memory cells are provided in a matrix form; forming a first insulating film over said source and drain regions, over said gate electrode and over said thick field insulator; providing a plurality of first apertures in said first insulating film by means of a first mask to expose the surface portions of all said drain regions; forming a second insulating film to cover said first apertures; providing second apertures in said second insulating film within selected ones of said first apertures by means of a second mask to expose the surface portions of selected drain regions, with the surface portions of non-selected drain regions being covered by said second insulating film; and forming a plurality of wiring layers on said second insulating film, electrically connected to said selected drain regions and extending in a direction perpendicular to said one direction.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1984-03-09 | 1984-09-08 | 1985-03-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1988-03-09 | 1988-09-08 | 1989-03-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1992-03-09 | 1992-09-08 | 1993-03-10 | $7700.00 | Window Closed / Lapsed |