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US4234761A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of communicating digital speech data and a memory for storing such data

Assignee: Texas Instruments Inc
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Filing: 1978-06-19
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Granted: 1980-11-18
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Expires: 1998-06-19
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Abstract

Abstract A method of communicating Digital Speech Data to a speech synthesis circuit. The data is compressed to on the order of 1000-1200 bits, per second for normal human speech. The speech synthesis circuit utilizes linear predictive coding techniques for producing high quality speech or other sounds. The data is preferably stored in a memory which is coupled to the speech synthesis circuit. The data has variable frame lengths; in the disclosed embodiment, four different frame lengths are described having frame lengths from four bits to forty-nine bits. The memory stores the variable frame length data and communicates the same to the speech synthesis circuit in response to certain control signals.

Inventors

  • 👤 Richard H. Wiggins, Jr.
  • 👤 George L. Brantingham

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 22:59
CPC Classifications
H; H04; H04B; H04B1/00; H04B1/66; H03; H03M; H03M7/00; H03M7/30; H03M7/40; H03M7/42

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 110 words
An apparatus for storing digital speech data and for communicating such digital speech data to a speech synthesis circuit, said apparatus comprising: (a) a memory for storing a plurality frames of digital speech data, said frames including a first frame type representative of voiced speech and a second frame type representative of unvoiced speech, said first frame type having a greater number of bits of data associated therewith than said second frame type; (b) means for addressing said memory with an address; and (c) control means responsive to control signals generated by said speech synthesis circuit for communicating the digital data stored in said memory to said speech synthesis circuit.
Claim 2
Independent Claim 110 words
An apparatus for storing digital speech data and for communicating such digital speech data to a speech synthesis circuit, said apparatus comprising: (a) a memory for storing a plurality frames of digital speech data, said frames including a first frame type representative of voiced speech and a second frame type representative of unvoiced speech, said first frame type having a greater number of bits of data associated therewith than said second frame type; (b) means for addressing said memory with an address; and (c) control means responsive to control signals generated by said speech synthesis circuit for communicating the digital data stored in said memory to said speech synthesis circuit.
Claim 3
Dependent Claim 37 words
The apparatus according to claim 1, wherein said control means further includes means responsive to control signals generated by said speech synthesis circuit for inserting an address outputted by said speech synthesis circuit into said addressing means.
Claim 4
Independent Claim 141 words
A method of communicating frames of digital speech data to a speech synthesis circuit, said method comprising the steps of: (a) communicating a first type of frame including a first number of bits representative of a speech energy coefficient, a second number of bits representative of a speech pitch coefficient and a third number of bits representative of speech filter parameters, said first type of frame being communicated during voiced speech; and (b) communicating a second type of frame including said first number of bits representative of a speech energy coefficient, said second number of bits and a fourth number of bits representative of speech filter parameters, said fourth number of bits being fewer than said third number of bits and said second number of bits being of a preselected state, said second type of frame being communicated during unvoiced speech.
Claim 5
Independent Claim 141 words
A method of communicating frames of digital speech data to a speech synthesis circuit, said method comprising the steps of: (a) communicating a first type of frame including a first number of bits representative of a speech energy coefficient, a second number of bits representative of a speech pitch coefficient and a third number of bits representative of speech filter parameters, said first type of frame being communicated during voiced speech; and (b) communicating a second type of frame including said first number of bits representative of a speech energy coefficient, said second number of bits and a fourth number of bits representative of speech filter parameters, said fourth number of bits being fewer than said third number of bits and said second number of bits being of a preselected state, said second type of frame being communicated during unvoiced speech.
Claim 6
Dependent Claim 45 words
The method according to claim 3 further including the step of: communicating a third type of frame having said first number of bits, said first number of bits being of a first preselected logical setting, said third type of frame being communicated during a pause.
Claim 7
Independent Claim 70 words
The method according to claims 3 or 4, wherein said first and second types of frames each include a repeat bit of one preselected state and further including the step of: communicating a repeat frame including said first number of bits representative of the speech energy coefficient, a second number of bits representative of the speech pitch coefficient and the repeat bit, said repeat bit being of the other state.
Claim 8
Dependent Claim 35 words
The method according to claim 5, wherein said first number of bits in each frame are communicated before the second number of bits in each frame in which the second number of bits are present.
Claim 9
Independent Claim 164 words
A method of communicating a frame of digital speech data to a speech synthesis circuit, said speech synthesis circuit, said method comprising the steps of: (a) communicating a first number of bits representative of an enclosed speech energy coefficient; (b) selectively communicating a second number of bits representative of an encoded speech pitch coefficient and a repeat bit, said second number of bits being communicated unless said first number of bits is of at least one preselected setting; (c) selectively communicating a third number of bits representative of a first number of encoded speech filter parameters, said third number of bits being communicated unless said repeat bit is of a preselected state; and (d) selectively communicating a fourth number of bits representative of a second number of encoded speech filter parameters, said fourth number of bits being communicated unless said repeat bit is of a said preselected state or unless the bits representative of said encoded speech pitch coefficient are of a preselected setting.
Claim 10
Independent Claim 164 words
A method of communicating a frame of digital speech data to a speech synthesis circuit, said speech synthesis circuit, said method comprising the steps of: (a) communicating a first number of bits representative of an enclosed speech energy coefficient; (b) selectively communicating a second number of bits representative of an encoded speech pitch coefficient and a repeat bit, said second number of bits being communicated unless said first number of bits is of at least one preselected setting; (c) selectively communicating a third number of bits representative of a first number of encoded speech filter parameters, said third number of bits being communicated unless said repeat bit is of a preselected state; and (d) selectively communicating a fourth number of bits representative of a second number of encoded speech filter parameters, said fourth number of bits being communicated unless said repeat bit is of a said preselected state or unless the bits representative of said encoded speech pitch coefficient are of a preselected setting.
Claim 11
Dependent Claim 56 words
The method according to claim 7, wherein said first number of bits is four bits, said second number of bits is six bits, and third number of bits is eighteen bits, said fourth number of bits is twenty-one bits, said first number of parameters is four parameters and said second number of parameters is six parameters.

References Cited (Backward Citations)

US3638007A Cited
US3969705A Cited
US4117263A Cited
US4163120A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1983-11-18 1984-05-19 1984-11-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1987-11-18 1988-05-19 1988-11-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1991-11-18 1992-05-19 1992-11-18 $7700.00 Window Closed / Lapsed

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