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US4214302A Expired / Lapsed US ⏱️ 0.0 years remaining

Eight bit standard connector bus for sixteen bit microcomputer

Assignee: Texas Instruments Inc
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Filing: 1978-04-24
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Granted: 1980-07-22
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Expires: 1998-04-24
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Abstract

Abstract A microcomputer system uses a standardized S-100 bus with eight bit Data In and eight bit Data Out lines, but has a sixteen bit microprocessor with sixteen bit bidirectional data input/output terminals. An arrangement is provided to cross-connect the Data In lines and Data Out lines for one memory board compared to another, these two memory boards being accessed by the same address. A processor board containing the microprocessor connects the Data In and Data Out lines to the data input/output terminals by controllable unidirectional buffers which criss-cross the bytes on write compared to read operations.

Inventors

  • 👤 Robert W. Schmidt

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 06:37
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/38; G06F13/40; G06F13/4004; G06F13/4009; G06F13/4018

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 191 words
A microcomputer comprising: a processor board containing a microprocessor having sixteen-bit bidirectional data terminals; at least two memory boards each containing separate eight-bit unidirectional Data In and Data Out lines, each memory board containing a memory array and coupling means connecting the array to the Data In lines and to the Data Out lines to transfer data to and from the array; a connector board containing a standardized bus with a plurality of plug-in connectors to receive the processor board and memory boards, the connector board having separate eight-bit Data In and Data Out lines for connection to said lines on the memory boards; means to cross-connect the data to and from the eight-bit Data In and Data Out lines for one of the memory boards but not the other; and connecting means on the processor board to connect the sixteen-bit bidirectional data terminals to the two separate eight-bit Data In and Data Out lines of the connector board, said microprocessor including means for simultaneously transmitting or simultaneously receiving sixteen bits to or from said memory arrays by utilizing said Data In and Data Out lines as a sixteen-bit bidirectional bus.
Claim 2
Dependent Claim 191 words
A microcomputer comprising: a processor board containing a microprocessor having sixteen-bit bidirectional data terminals; at least two memory boards each containing separate eight-bit unidirectional Data In and Data Out lines, each memory board containing a memory array and coupling means connecting the array to the Data In lines and to the Data Out lines to transfer data to and from the array; a connector board containing a standardized bus with a plurality of plug-in connectors to receive the processor board and memory boards, the connector board having separate eight-bit Data In and Data Out lines for connection to said lines on the memory boards; means to cross-connect the data to and from the eight-bit Data In and Data Out lines for one of the memory boards but not the other; and connecting means on the processor board to connect the sixteen-bit bidirectional data terminals to the two separate eight-bit Data In and Data Out lines of the connector board, said microprocessor including means for simultaneously transmitting or simultaneously receiving sixteen bits to or from said memory arrays by utilizing said Data In and Data Out lines as a sixteen-bit bidirectional bus.
Claim 3
Dependent Claim 92 words
A microcomputer according to claim 1 wherein the means to cross-connect comprises jumper conductors on the connector board which connect the eight-bit Data In lines one one side of an open circuit in the eight-bit Data In and Data Out lines to the eight-bit Data Out lines on the other side of the open circuit, and like jumper conductors on the connector board which connect the eight-bit Data Out lines on said one side of the open circuit to the eight-bit Data In lines on the other side of the open circuit.
Claim 4
Dependent Claim 48 words
A microcomputer according to claim 2 wherein one of the memory boards is connected to a plug in connector on said one side of the open circuit and another of the memory boards is connected to a plug in connector on the other side of the open circuit.
Claim 5
Dependent Claim 52 words
A microcomputer according to claim 3 wherein the Data In and Data Out lines on said connector board are coupled by the connecting means on the processor board to the sixteen-bit bidirectional data terminals via controllable unidirectional buffers which cross-connect the Data In and Data Out connections for read and write operations.
Claim 6
Independent Claim 226 words
A method of using a 2N bit microprocessor with a standardized connector board having an N bit data in bus and an N bit data out bus, where N is an integral power of two, comprising the steps of: forming an open circuit gap in the data in bus and data out bus on said connector board; cross-connecting the data in in bus on one side of the gap with the data out bus on the other side of the gap, cross-connecting the data out bus on said one side of the gap with the data in bus on the other side of the gap, and connecting Data In lines and Data Out lines of one memory board to the connector board on said one side of the gap and connecting Data In lines and Data Out lines of another memory board to the connector board on the other side of the gap, and connecting a 2N bit microprocessor on a processor board to the connector board with the 2N bidirectional data lines of the microprocessor being connected to the N bit Data In lines and N bit data out lines by unidirectional controllable cross-connected buffers, said microprocessor simultaneously transmitting or simultaneously receiving 2N bits to or from said memory arrays by utilizing said Data In and Data Out lines as a 2N bit bidirectional bus.
Claim 7
Independent Claim 226 words
A method of using a 2N bit microprocessor with a standardized connector board having an N bit data in bus and an N bit data out bus, where N is an integral power of two, comprising the steps of: forming an open circuit gap in the data in bus and data out bus on said connector board; cross-connecting the data in in bus on one side of the gap with the data out bus on the other side of the gap, cross-connecting the data out bus on said one side of the gap with the data in bus on the other side of the gap, and connecting Data In lines and Data Out lines of one memory board to the connector board on said one side of the gap and connecting Data In lines and Data Out lines of another memory board to the connector board on the other side of the gap, and connecting a 2N bit microprocessor on a processor board to the connector board with the 2N bidirectional data lines of the microprocessor being connected to the N bit Data In lines and N bit data out lines by unidirectional controllable cross-connected buffers, said microprocessor simultaneously transmitting or simultaneously receiving 2N bits to or from said memory arrays by utilizing said Data In and Data Out lines as a 2N bit bidirectional bus.
Claim 8
Dependent Claim 20 words
A method according to claim 5 wherein N is eight and the standardized connector board uses the S-100 bus convention.

References Cited (Backward Citations)

US3938098A Cited
US4016546A Cited
US4057846A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1983-07-22 1984-01-21 1984-07-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1987-07-22 1988-01-21 1988-07-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1991-07-22 1992-01-21 1992-07-22 $7700.00 Window Closed / Lapsed

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