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US4210993A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for fabricating a field effect transistor

Assignee: Hitachi Ltd
•
Filing: 1979-02-02
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Granted: 1980-07-08
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Expires: 1999-02-02
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Abstract

Abstract A field effect transistor is fabricated by forming a silicon dioxide film having a region where said silicon dioxide film becomes thinner at that area on one surface of a silicon semiconductor substrate of a first conductivity type at which the field effect transistor is to be formed. On said silicon dioxide film there is deposited a polycrystalline silicon layer which has an impurity concentration higher than that of the silicon semiconductor substrate. The polycrystalline silicon layer is removed by selective etching so as to leave only a part which becomes a gate of the field effect transistor. A surface part of the silicon dioxide film over the entire area is removed by employing as a mask the part of the polycrystalline silicon layer to become the gate and to the extent that the surface of the silicon semiconductor substrate is exposed at the other part in the region, a silicon dioxide film is grown by thermally oxidizing the whole surface of the polycrystalline silicon layer to become the gate and the exposed surface of the semiconductor substrate, the silicon dioxide film produced at the surface of the polycrystalline silicon layer being thicker than the silicon dioxide film produced at the exposed surface of the semiconductor substrate. Windows for a source and drain are formed by removing the silicon dioxide films over the entire area by such thickness that the surface of the silicon semiconductor substrate is exposed at the part in the region other than the part covered by the polycrystalline silicon layer to become the gate, but so that the polycrystalline silicon layer is not exposed; the source and the drain are formed by doping surface portions of the semiconductor substrate with an impurity of a second conductivity type opposite to the first conductivity type through the windows formed by the preceding step; removing a part of the silicon dioxide film is removed by selective etching so as to expose a part of the polycrystalline silicon layer. An electric conductor is deposited over the entire area, and finally the electric conductor is formed into a predetermined pattern by selective etching so as to obtain source, gate and drain electrodes.

Inventors

  • 👤 Hideo Sunami

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 22:50
CPC Classifications
H; H10; H10P; H10P95/00; H10D; H10D30/00; H10D30/60; Y; Y10; Y10S; Y10S148/00; Y10S148/141

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 429 words
A method for fabricating a field effect transistor, comprising the steps of: forming a silicon dioxide film having a region where said silicon dioxide film becomes thinner at that area on one surface of a silicon semiconductor substrate of a first conductivity type at which the field effect transistor is to be formed, depositing on said silicon dioxide film a polycrystalline silicon layer which has an impurity concentration higher than that of said silicon semiconductor substrate, removing said polycrystalline silicon layer by selective etching so as to leave only a part which becomes a gate of said field effect transistor, removing a surface part of said silicon dioxide film over the entire area by employing as a mask said part of said polycrystalline silicon layer to become said gate and to the extent that the surface of said silicon semiconductor substrate is exposed at the other part in said region, simultaneously growing a silicon dioxide film on said exposed surface of said semiconductor substrate and said polycrystalline silicon layer to become said gate by thermally oxidizing the whole surface of said polycrystalline silicon layer to become said gate and the exposed surface on said semiconductor substrate, the silicon dioxide film thickness produced at said surface of said polycrystalline silicon layer being formed at a faster rate than the thickness at the exposed surface of said semiconductor substrate due to the higher impurity concentration of said polycrystalline silicon layer, whereby the silicon dioxide film produced at said surface of said polycrystalline silicon layer is thicker than the silicon dioxide film produced at said exposed surface of said semiconductor substrate, forming windows for a source and a drain by removing said silicon dioxide films over the entire area by such thickness that said surface of said silicon semiconductor substrate is exposed at the part in said region other than said part covered by said polycrystalline silicon layer to become said gate, but that said polycrystalline silicon layer is not exposed due to the greater thickness of the silicon dioxide film on said polycrystalline silicon layer, forming the source and the drain by doping surface portions of said semiconductor substrate with an impurity of a second conductivity type opposite to said first conductivity type through the windows formed by the preceding step, removing a part of said silicon dioxide film by selective etching so as to expose a part of said polycrystalline silicon layer, depositing an electric conductor over the entire area, and forming said electric conductor into a predetermined pattern by selective etching, thereby to form source, gate and drain electrodes.
Claim 2
Independent Claim 429 words
A method for fabricating a field effect transistor, comprising the steps of: forming a silicon dioxide film having a region where said silicon dioxide film becomes thinner at that area on one surface of a silicon semiconductor substrate of a first conductivity type at which the field effect transistor is to be formed, depositing on said silicon dioxide film a polycrystalline silicon layer which has an impurity concentration higher than that of said silicon semiconductor substrate, removing said polycrystalline silicon layer by selective etching so as to leave only a part which becomes a gate of said field effect transistor, removing a surface part of said silicon dioxide film over the entire area by employing as a mask said part of said polycrystalline silicon layer to become said gate and to the extent that the surface of said silicon semiconductor substrate is exposed at the other part in said region, simultaneously growing a silicon dioxide film on said exposed surface of said semiconductor substrate and said polycrystalline silicon layer to become said gate by thermally oxidizing the whole surface of said polycrystalline silicon layer to become said gate and the exposed surface on said semiconductor substrate, the silicon dioxide film thickness produced at said surface of said polycrystalline silicon layer being formed at a faster rate than the thickness at the exposed surface of said semiconductor substrate due to the higher impurity concentration of said polycrystalline silicon layer, whereby the silicon dioxide film produced at said surface of said polycrystalline silicon layer is thicker than the silicon dioxide film produced at said exposed surface of said semiconductor substrate, forming windows for a source and a drain by removing said silicon dioxide films over the entire area by such thickness that said surface of said silicon semiconductor substrate is exposed at the part in said region other than said part covered by said polycrystalline silicon layer to become said gate, but that said polycrystalline silicon layer is not exposed due to the greater thickness of the silicon dioxide film on said polycrystalline silicon layer, forming the source and the drain by doping surface portions of said semiconductor substrate with an impurity of a second conductivity type opposite to said first conductivity type through the windows formed by the preceding step, removing a part of said silicon dioxide film by selective etching so as to expose a part of said polycrystalline silicon layer, depositing an electric conductor over the entire area, and forming said electric conductor into a predetermined pattern by selective etching, thereby to form source, gate and drain electrodes.
Claim 3
Dependent Claim 171 words
A method for fabricating a field effect transistor according to claim 1, wherein the step of forming a silicon dioxide film having a region where said silicon dioxide film becomes thinner at that area on one surface of a silicon semiconductor substrate of a first conductivity type at which the field effect transistor is to be formed comprises the steps of forming a silicon nitride film on the entire area of said one surface of said silicon semiconductor substrate of said first conductivity type; removing said silicon nitride film so as to leave only a part lying at said area at which said field effect transistor is to be formed; forming a thick silicon dioxide film by thermally oxidizing a surface portion of said silicon semiconductor substrate by employing as a mask the silicon nitride film left by the preceding step; removing the remaining silicon nitride film; and forming a thin silicon dioxide film by thermally oxidizing a surface portion of said silicon semiconductor substrate as exposed by the preceding step.
Claim 4
Dependent Claim 51 words
A method for fabricating a field effect transistor according to claim 1, wherein said silicon semiconductor substrate has an impurity concentration of 10 14 to 10 17 cm -3 , and said polycrystalline silicon layer to become said gate has an impurity concentration of at least 10 20 cm -3 .
Claim 5
Dependent Claim 61 words
A method for fabricating a field effect transistor according to claim 1, wherein the step of growing silicon dioxide films by thermally oxidizing a surface of said polycrystalline silicon layer to become said gate and the exposed surface of said semiconductor substrate is carried out in an oxidizing ambient containing water vapor at a temperature between 600° C. and 900° C.
Claim 6
Dependent Claim 37 words
A method for fabricating a field effect transistor according to claim 1, wherein the windows for a source and a drain are formed by simultaneously removing a substantially equal thickness of all of said silicon dioxide films.
Claim 7
Dependent Claim 31 words
A method for fabricating a field effect transistor according to claim 1, wherein the windows for a source and a drain are formed by removing said silicon dioxide films by etching.
Claim 8
Dependent Claim 36 words
A method for fabricating a field effect transistor according to claim 5, wherein the simultaneous removing of a substantially equal thickness of all of said silicon dioxide films is achieved by etching the silicon dioxide films.

References Cited (Backward Citations)

US3673471A Cited
US3798752A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1983-07-08 1984-01-07 1984-07-08 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1987-07-08 1988-01-07 1988-07-08 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1991-07-08 1992-01-07 1992-07-08 $7700.00 Window Closed / Lapsed

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