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US4200877A Expired / Lapsed US ⏱️ 0.0 years remaining

Temperature-compensated voltage reference diode with intermediate polycrystalline layer

Assignee: Hitachi Ltd
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Filing: 1977-12-13
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Granted: 1980-04-29
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Expires: 1997-12-13
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Abstract

Abstract Disclosed is a temperature-compensated voltage reference diode comprising a breakdown PN junction for establishing the zener breakdown voltage, a PN junction for temperature compensation having a temperature coefficient opposite to that of the breakdown PN junction, the breakdown PN junction and the temperature-compensating PN junction being integrally formed in a semiconductor substrate in a laminated fashion with these PN junctions connected in inverse series with each other, and a semiconductor region interposed between the breakdown PN junction and the temperature compensating PN junction for substantially preventing a transistor action from taking place between the respective PN junctions, wherein the semiconductor region is formed of at least one of a polycrystalline semiconductor layer and a single crystal semiconductor layer having an impurity concentration of higher than about 5×10 18 atoms/cm 3 .

Inventors

  • 👤 Takaya Suzuki
  • 👤 Mitsuru Ura
  • 👤 Takuzo Ogawa

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 05:47
CPC Classifications
H; H10; H10D; H10D8/00; H10D8/20; H10D8/25; H10D62/00; H10D62/40

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 130 words
A temperature-compensated voltage-reference diode comprising: a semiconductor substrate; a first PN junction having a given zener breakdown voltage and having a first temperature coefficient, said first PN junction being reverse-biased; a second PN junction for temperature compensation having a second temperature coefficient of opposite sign to said first temperature coefficient of said first PN junction and being forward-biased, said second PN junction together with said first PN junction being integrally formed in said semiconductor substrate in a laminated fashion with said first and second PN junctions connected in inverse series with each other; and a semiconductor region interposed between said first and second PN junctions to substantially prevent a transistor action from taking place between said first and second PN junctions, said semiconductor region including therein a polycrystalline semiconductor layer.
Claim 2
Dependent Claim 130 words
A temperature-compensated voltage-reference diode comprising: a semiconductor substrate; a first PN junction having a given zener breakdown voltage and having a first temperature coefficient, said first PN junction being reverse-biased; a second PN junction for temperature compensation having a second temperature coefficient of opposite sign to said first temperature coefficient of said first PN junction and being forward-biased, said second PN junction together with said first PN junction being integrally formed in said semiconductor substrate in a laminated fashion with said first and second PN junctions connected in inverse series with each other; and a semiconductor region interposed between said first and second PN junctions to substantially prevent a transistor action from taking place between said first and second PN junctions, said semiconductor region including therein a polycrystalline semiconductor layer.
Claim 3
Dependent Claim 48 words
A temperature-compensated voltage-reference diode as claimed in claim 1, wherein said semiconductor region for preventing transistor action includes therein a first polycrystalline semiconductor layer having one conductivity type, and wherein one of a pair of semiconductor regions constituting said second PN junction is said first polycrystalline semiconductor layer.
Claim 4
Dependent Claim 35 words
A temperature-compensated voltage-reference diode as claimed in claim 2, wherein the other of said pair of said semiconductor regions constituting said second PN junction is a second polycrystalline semiconductor layer having the other conductivity type.
Claim 5
Dependent Claim 28 words
A temperature-compensated voltage-reference diode as claimed in claim 3, wherein one of a pair of semiconductor regions constituting said first PN junction is said first polycrystalline semiconductor layer.
Claim 6
Dependent Claim 67 words
A temperature-compensated voltage-reference diode as claimed in claim 4, wherein the other of said pair of said semiconductor regions constituting said first PN junction is a single crystal semiconductor layer having the other conductivity type and having a thickness greater than that of the depletion layer which is to be generated when said first PN junction is reversely biassed, said thickness substantially determining said zener breakdown voltage.
Claim 7
Dependent Claim 33 words
A temperature-compensated voltage-reference diode as claimed in claim 3, wherein one of a pair of semiconductor regions constituting said first PN junction is a third polycrystalline semiconductor layer having the other conductivity type.
Claim 8
Dependent Claim 67 words
A temperature-compensated voltage-reference diode as claimed in claim 6, wherein the other of said pair of said semiconductor regions constituting said first PN junction is a single crystal semiconductor layer having said one conductivity type and having a thickness greater than that of the depletion layer which is to be generated when said first PN junction is reversely biassed, said thickness substantially determining said zener breakdown voltage.
Claim 9
Dependent Claim 89 words
A temperature-compensated voltage-reference diode as claimed in claim 1, wherein said semiconductor region for preventing said transistor action comprising a first single crystal semiconductor layer having one conductivity type and having an impurity concentration of higher than about 5×10 18 atoms/cm 3 and a first polycrystalline semiconductor layer having said one conductivity type and formed contiguous to one of the principal surfaces of said first single cyrstal semiconductor layer, and wherein one of a pair of semiconductor regions constituting said second PN junction is said first polycrystalline semiconductor layer.
Claim 10
Dependent Claim 35 words
A temperature-compensated voltage-reference diode as claimed in claim 8, wherein the other of said pair of said semiconductor regions constituting said second PN junction is a second polycrystalline semiconductor layer having the other conductivity type.
Claim 11
Dependent Claim 109 words
A temperature-compensated voltage-reference diode as claimed in claim 8, wherein one of a pair of semiconductor regions constituting said first PN junction is a second single crystal semiconductor layer having said one conductivity type and formed contiguous to the other principal surface of said first single crystal semiconductor layer, and wherein said second single crystal semiconductor layer has an impurity concentration higher than that of said first single crystal semiconductor layer and has a thickness greater than that of the depletion layer which is to be generated when said first PN junction is reverse-biassed, said thickness of said second single crystal semiconductor layer substantially determining the zener breakdown voltage.
Claim 12
Dependent Claim 38 words
A temperature-compensated voltage-reference diode as claimed in claim 1, wherein said semiconductor region for preventing said transistor action further includes a single crystal semiconductor layer having an impurity concentration of higher than about 5×10 18 atoms/cm 3 .

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1983-04-29 1983-10-29 1984-04-29 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1987-04-29 1987-10-29 1988-04-29 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1991-04-29 1991-10-29 1992-04-29 $7700.00 Window Closed / Lapsed

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