Patent US4191856A successfully refreshed from Google Patents.
US4191856A
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Analog multiplexer
Assignee: Toshiba Corp
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Filing: 1978-07-28
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Granted: 1980-03-04
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Expires: 1998-07-28
Abstract
Abstract Disclosed is an analog multiplexer in which a plurality of emitter follower differential amplifiers formed of several pairs of bipolar transistors connected in parallel with each other are connected in common to one terminal of a power source through a current mirror load circuit, and to the other terminal of the power source via a switch circuit and a constant-current source. The switch circuit is to connect the constant-current source selectively to the common conjunction of the emitters of each pair of emitter follower differential amplifiers.
Inventors
- 👤 Katsumi Nagano
- 👤 Yasuo Taguchi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 12:33
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/60; H03K17/603; H03K17/62; H03K17/6257; H03K17/6264; H04; H04J; H04J3/00; H04J3/02; H04J3/04; H04J3/047
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
181 words
An analog multiplexer comprising at least one differential circuit composed of first and second bipolar transistors the emitters of which are connected in common, an analog signal input terminal connected to the base of said first bipolar transistor, an analog output terminal connected to the base of said second bipolar transistor, a load composed of a current mirror connected between the collectors of said first and second bipolar transistors and one terminal of a power source, a first constant-current source, a switch circuit with one terminal connected to the common junction of the emitters of said first and second bipolar transistors and the other terminal connected to the other terminal of said power source through a first constantcurrent source, control circuit means for controlling the conductivity between said terminals of said switch circuit, output circuit means responsive to the signal at said collector of said second bipolar transistor for connecting said one terminal of the power source to said analog output terminal, and a second constant-current source connected between said analog output terminal and said other terminal of the power source.
Claim 2
Dependent Claim
181 words
An analog multiplexer comprising at least one differential circuit composed of first and second bipolar transistors the emitters of which are connected in common, an analog signal input terminal connected to the base of said first bipolar transistor, an analog output terminal connected to the base of said second bipolar transistor, a load composed of a current mirror connected between the collectors of said first and second bipolar transistors and one terminal of a power source, a first constant-current source, a switch circuit with one terminal connected to the common junction of the emitters of said first and second bipolar transistors and the other terminal connected to the other terminal of said power source through a first constantcurrent source, control circuit means for controlling the conductivity between said terminals of said switch circuit, output circuit means responsive to the signal at said collector of said second bipolar transistor for connecting said one terminal of the power source to said analog output terminal, and a second constant-current source connected between said analog output terminal and said other terminal of the power source.
Claim 3
Dependent Claim
44 words
An analog multiplexer according to claim 1, wherein said control circuit means includes control input terminals supplied with a plurality of binary signals and a decoder supplied with said input binary signals to control said switch circuit by a combination of said binary signals.
Claim 4
Dependent Claim
17 words
An analog multiplexer according to claim 1, wherein said output circuit means includes a third bipolar transistor.
Claim 5
Dependent Claim
94 words
An analog multiplexer according to claim 1, wherein said output circuit means comprises a third bipolar transistor having a base coupled to the collector of said second bipolar transistor, and an emitter-collector path coupled between said one terminal of said power supply and said analog output terminal, and said output circuit means further includes means for preventing oscillations comprising a resistance with one end connected in series with the emitter of said third bipolar transistor, and a capacitor connected between the other end of said resistance and the base of said third bipolar transistor.
Claim 6
Dependent Claim
17 words
An analog multiplexer according to claim 1, wherein said differential circuit is composed of a differential amplifier.
Claim 7
Dependent Claim
111 words
An analog multiplexer according to claim 1, wherein said current mirror includes a current repeater composed of third and fourth transistors having the emitters commonly connected to the one end of said power source and their bases connected with each other, a fifth transistor having an emitter connected to a connection point of the bases of the third and fourth transistors and a collector connected to the other end of the power source, and a sixth transistor having a collector connected to the one end of the power source, a base connected to the base of the fifth transistor and an emitter connected to one end of the first constantcurrent source.
References Cited (Backward Citations)
US3535458A
Cited
US3838296A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1983-03-04 | 1983-09-03 | 1984-03-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1987-03-04 | 1987-09-03 | 1988-03-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1991-03-04 | 1991-09-03 | 1992-03-04 | $7700.00 | Window Closed / Lapsed |