Method and device for receiving an interface signal

Claim 1

A method of receiving a codirectional interface digital signal coded in bipolar form, each data bit being represented by means of four bits (1,1,0,0) for a binary "1" and (1,0,1,0) for a binary "0", a polarity alternation being effected every bit with a violation of polarity at each octet, comprising the steps of: separating the interface signal into its positive and negative components; producing a rectified signal from the said components; deriving from the rectified signal a bit timing signal; deriving the decoded data signal from the rectified signal and the timing signal; deriving from said components a signal representing the alternations of polarity; deriving from this latter signal and from the bit timing signal an octet timing signal; and comparing in phase the bit timing signal and the polarity alternation signal, a pulse for rephasing the bit timing signal being produced when the states of these two signals do not coincide at the time of a polarity alternation.

Claim 2

A method of receiving a codirectional interface digital signal coded in bipolar form, each data bit being represented by means of four bits (1,1,0,0) for a binary "1" and (1,0,1,0) for a binary "0", a polarity alternation being effected every bit with a violation of polarity at each octet, comprising the steps of: separating the interface signal into its positive and negative components; producing a rectified signal from the said components; deriving from the rectified signal a bit timing signal; deriving the decoded data signal from the rectified signal and the timing signal; deriving from said components a signal representing the alternations of polarity; deriving from this latter signal and from the bit timing signal an octet timing signal; and comparing in phase the bit timing signal and the polarity alternation signal, a pulse for rephasing the bit timing signal being produced when the states of these two signals do not coincide at the time of a polarity alternation.

Claim 3

A device for receiving a codirectional interface digital signal coded in bipolar form, each data bit being represented by means of four bits (1,1,0,0) for a binary "1" and (1,0,1,0) for a binary "0", a polarity alternation being effected every bit, with a violation of polarity at each octet, and device comprising a transformer of which the secondary winding comprises a central point at a fixed potential, for separating the interface signal into its positive and negative components, a gate for delivering a rectified signal from said positive and negative components, a monostable multivibrator delivering a bit timing signal from the rectified signal, a first flip-flop deriving from the rectified signal and the timing signal the decoded data signal, a second flip-flop deriving, from said positive and negative components, a signal representing the polarity alternations, a circuit connected to the monostable multivibrator and to the second flip-flop for delivering an octet timing signal, and a third flip-flop receiving at its inputs the timing signal from the monostable multivibrator and the signal from said second flip-flop, said third flip-flop delivering a rephasing pulse to the monostable multivibrator when the states of its two inputs signals do not coincide at the time of a polarity alternation.

Claim 4

A device for receiving a codirectional interface digital signal coded in bipolar form, each data bit being represented by means of four bits (1,1,0,0) for a binary "1" and (1,0,1,0) for a binary "0", a polarity alternation being effected every bit, with a violation of polarity at each octet, and device comprising a transformer of which the secondary winding comprises a central point at a fixed potential, for separating the interface signal into its positive and negative components, a gate for delivering a rectified signal from said positive and negative components, a monostable multivibrator delivering a bit timing signal from the rectified signal, a first flip-flop deriving from the rectified signal and the timing signal the decoded data signal, a second flip-flop deriving, from said positive and negative components, a signal representing the polarity alternations, a circuit connected to the monostable multivibrator and to the second flip-flop for delivering an octet timing signal, and a third flip-flop receiving at its inputs the timing signal from the monostable multivibrator and the signal from said second flip-flop, said third flip-flop delivering a rephasing pulse to the monostable multivibrator when the states of its two inputs signals do not coincide at the time of a polarity alternation.