Patent US4183033A successfully refreshed from Google Patents.
US4183033A
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Field effect transistors
Assignee: National Research Development Corp UK
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Filing: 1978-03-13
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Granted: 1980-01-08
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Expires: 1998-03-13
Abstract
Abstract A field effect transistor for operation at temperatures below 150° K. is capable of operating at low voltage and current levels at high speed. The transistor is fabricated by deposition of metal source drain and gate electrodes upon a layer of semi-conductor having a concentration of free carriers less than 10 16 cm -3 formed on a substrate having a resistivity greater than 10 4 ohm-cm.
Inventors
- 👤 Huw D. Rees
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 21:47
CPC Classifications
H; H10; H10D; H10D48/00; H10D48/387; H10D30/00; H10D30/80; H10D30/87
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
111 words
A field effect transistor maintained at an operating temperature below 150° K. comprising: a substrate of resistivity greater than 10 4 ohm-cm at the operating temperature; a layer of semiconductor formed thereon; metal source, drain and gate electrodes in contact with said substrate; said source and said drain electrodes being arranged with respect to said gate electrode to provide a controllable channel in said layer for charge carrier flow therebetween; said layer having a concentration of free carriers less than 10 16 cm -3 such that, at the operating temperature, carrier velocity saturation in said layer is achieved at an applied electric field intensity of less than 1 KVcm -1 .
Claim 2
Dependent Claim
111 words
A field effect transistor maintained at an operating temperature below 150° K. comprising: a substrate of resistivity greater than 10 4 ohm-cm at the operating temperature; a layer of semiconductor formed thereon; metal source, drain and gate electrodes in contact with said substrate; said source and said drain electrodes being arranged with respect to said gate electrode to provide a controllable channel in said layer for charge carrier flow therebetween; said layer having a concentration of free carriers less than 10 16 cm -3 such that, at the operating temperature, carrier velocity saturation in said layer is achieved at an applied electric field intensity of less than 1 KVcm -1 .
Claim 3
Dependent Claim
25 words
A field effect transistor as claimed in claim 1 wherein said layer is formed of gallium arsenide of electron density 5·10 14 cm -3 .
Claim 4
Dependent Claim
25 words
A field effect transistor as claimed in claim 1 having a second-layer of semicondutor under said gate electrode, said second-layer being doped with donor impurities.
Claim 5
Dependent Claim
25 words
A field effect transistor as claimed in claim 1 having a second-layer of semiconductor under said gate electrode, said second-layer being doped with acceptor impurities.
Claim 6
Dependent Claim
26 words
A field effect transistor as claimed in claim 3 wherein there exists a region under said gate electrode, said region being normally fully depleted of carriers.
Claim 7
Dependent Claim
26 words
A field effect transistor as claimed in claim 4 wherein there exists a region under said gate electrode, said region being normally fully depleted of carriers.
Claim 8
Dependent Claim
19 words
A field effect transistor as claimed in claim 1, there being formed on said substrate a plurality of transistors.
References Cited (Backward Citations)
US3997908A
Cited
US3958266A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1983-01-07 | 1983-07-09 | 1984-01-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1987-01-07 | 1987-07-09 | 1988-01-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1991-01-07 | 1991-07-09 | 1992-01-08 | $7700.00 | Window Closed / Lapsed |