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US4170500A Expired / Lapsed US ⏱️ 0.0 years remaining

Process for forming field dielectric regions in semiconductor structures without encroaching on device regions

Assignee: National Semiconductor Corp
•
Filing: 1979-01-15
•
Granted: 1979-10-09
•
Expires: 1999-01-15
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Abstract

Abstract A process for forming the field dielectric regions in semiconductor structures without encroaching upon device areas includes the steps of forming an insulating layer on a surface of a semiconductor substrate, forming regions of selected material on the surface of said insulating layer, converting said regions of selected material to insulating material, and removing the insulating layer from the surface of the semiconductor substrate except where the insulating material overlies the insulating layer. Active and/or passive electronic devices may then be formed in the exposed regions of said semiconductor substrate using well known semiconductor processing technology. The combined insulating layer and insulating material will prevent field inversion from occuring in all of those regions of the semiconductor substrate on which the insulating layer and the insulating material are disposed.

Inventors

  • 👤 Peter A. Crossley

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 22:01
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10P; H10P34/00; H10P76/00; H10P76/40; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/10

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 62 words
A process for forming field dielectric regions on a semiconductor substrate comprising: forming an insulating layer on the semiconductor substrate, forming regions of selected material on said insulating layer wherever the field dielectric regions are desired, converting the selected material to insulating material, and removing the insulating layer from the substrate except where the regions of insulating material overly the insulating layer.
Claim 2
Dependent Claim 62 words
A process for forming field dielectric regions on a semiconductor substrate comprising: forming an insulating layer on the semiconductor substrate, forming regions of selected material on said insulating layer wherever the field dielectric regions are desired, converting the selected material to insulating material, and removing the insulating layer from the substrate except where the regions of insulating material overly the insulating layer.
Claim 3
Dependent Claim 22 words
A process as in claim 1 wherein the insulating layer comprises a second layer formed on the surface of a first layer.
Claim 4
Dependent Claim 20 words
A process as in claim 2 wherein the second layer is silicon nitride and the first layer is silicon dioxide.
Claim 5
Dependent Claim 13 words
A process as in claim 1 wherein the selected material is polycrystalline silicon.
Claim 6
Dependent Claim 28 words
A process as in claim 4 wherein the insulating material is silicon dioxide and the conversion of the polycrystalline silicon to silicon dioxide is accomplished by thermal oxidation.
Claim 7
Dependent Claim 22 words
A process as in claim 1 wherein the step of removing the insulating layer is performed by at least one etching process.
Claim 8
Dependent Claim 23 words
A process as in claim 1 further including the step of forming electronic devices in the substrate between the regions of insulating material.
Claim 9
Dependent Claim 36 words
A process as in claim 1 wherein: the insulating layer comprises a layer of silicon nitride formed on a layer of silicon dioxide, the selected material is polycrystalline silicon, and the insulating material is silicon dioxide.
Claim 10
Dependent Claim 18 words
A process as in claim 8 wherein the polycrystalline silicon is converted to silicon dioxide by thermal oxidation.
Claim 11
Dependent Claim 29 words
A process as in claim 3 wherein a dopant is introduced into the substrate after the silicon dioxide layer is formed and before the silicon nitride layer is formed.

References Cited (Backward Citations)

US3966501A Cited
US4030952A Cited
US3912557A Cited
US3899373A Cited
US4074304A Cited
US4075045A Cited
US4046606A Cited
US4110125A Cited
US4140548A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1982-10-08 1983-04-09 1983-10-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1986-10-08 1987-04-09 1987-10-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1990-10-08 1991-04-09 1991-10-09 $7700.00 Window Closed / Lapsed

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