Restricted rate of change phase lock loop apparatus

Claim 2

Phase lock loop apparatus comprising, in combination: phase detection means including first and second input signal means, control input means and control signal output means; signal controlled variable frequency signal generating means connected between said control signal output means and said first input signal means of said phase detection means; and third means connected between said control signal output means and said control input means of said phase detection means for limiting the control signals appearing at said control signal output means to within a predetermined set of boundaries through the use of a feedback control signal applied to said control input means.

Claim 3

Apparatus as claimed in claim 1 wherein said phase detection means comprises, in combination: phase detector means of the type that is switched from one state to the other upon each occurrence of an input pulse at said first and second input means, whereby a substantially symmetrical output square wave is obtained when a signal having first characteristics appears at said first input signal means midway between two signal pulses of the same characteristics appearing at said second input signal means; and filter means for averaging the voltage excursions of the square wave signal obtained from said phase detector, the averaged signal being supplied as the control signal at said control signal output means.

Claim 4

Apparatus as claimed in claim 2 wherein said third means comprises, in combination: signal magnitude detection means for detecting the magnitude of said control signal received from said phase detection means relative to said predetermined set of boundaries; and signal amplitude detection means for preventing switching operation of said phase detector from a time immediately subsequent to the time at which said control signal exceeds said predetermined set of boundaries until it is returned to within said set of boundaries.

Claim 5

Phase lock loop apparatus comprising, in combination: phase detection means including first and second input signal means, control input means and control signal output means, for providing an output signal which varies in amplitude in accordance with the relative time of occurrence of signals of a given characteristic being applied at said first and said second input signal means; signal controlled variable frequency signal generating means connected between said control signal output means and said first input signal means of said phase detection means; and third means connected between said control signal output means and said control input means of said phase detection means for limiting the frequency offset of the signal generated by said signal controlled variable frequency signal generating means to less than a predetermined value through the use of a feedback signal applied to said control input means.

Claim 6

Phase lock loop apparatus comprising, in combination: phase detection means including first and second input signal means, control input means and control signal output means, for providing an output signal which varies in amplitude in accordance with the relative time of occurrence of signals of a given characteristic being applied at said first and said second input signal means; signal controlled variable frequency signal generating means connected between said control signal output means and said first input signal means of said phase detection means; and third means connected between said control signal output means and said control input means of said phase detection means for limiting the frequency offset of the signal generated by said signal controlled variable frequency signal generating means to less than a predetermined value through the use of a feedback signal applied to said control input means.

Claim 7

Control apparatus comprising, in combination: digital data signal lock loop means, including signal input means, for internally generating a first signal which is driven toward phase lock with respect to a second signal applied to said signal input means whenever said second signal changes a given characteristic with respect to the same characteristic of the first signal; and limiting means, connected to said signal lock loop means outside the signal flow path from input to output of said signal lock means, for allowing said first signal to continue being driven toward phase lock while preventing the rate of change of said first signal from exceeding a chosen value.

Claim 8

Control apparatus comprising, in combination: digital data signal lock loop means, including signal input means, for internally generating a first signal which is driven toward phase lock with respect to a second signal applied to said signal input means whenever said second signal changes a given characteristic with respect to the same characteristic of the first signal; and limiting means, connected to said signal lock loop means outside the signal flow path from input to output of said signal lock means, for allowing said first signal to continue being driven toward phase lock while preventing the rate of change of said first signal from exceeding a chosen value.

Claim 9

Control apparatus comprising, in combination: signal lock loop means, including signal input means, for internally generating a first signal which is driven toward phase lock with respect to a second signal applied to said signal input means whenever said second signal changes a given characteristic with respect to the same characteristic of the first signal; and limiting means, connected to said signal lock loop means outside the signal flow path from input to output of said signal lock means, for continuing the drive of said first signal toward phase lock while restricting the dynamic response of the signal lock loop means to less than a given maximum value.

Claim 10

Control apparatus comprising, in combination: signal lock loop means, including signal input means, for internally generating a first signal which is driven toward phase lock with respect to a second signal applied to said signal input means whenever said second signal changes a given characteristic with respect to the same characteristic of the first signal; and limiting means, connected to said signal lock loop means outside the signal flow path from input to output of said signal lock means, for continuing the drive of said first signal toward phase lock while restricting the dynamic response of the signal lock loop means to less than a given maximum value.