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US4161722A Expired / Lapsed US ⏱️ 0.0 years remaining

Signal decoding system

Assignee: United States Department of the Navy
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Filing: 1967-11-30
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Granted: 1979-07-17
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Expires: 1987-11-30
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Abstract

Abstract A decoding logic receiver is used to actuate a device by remote control w and only when the proper coded signal is received.

Inventors

  • 👤 Martin S. Tatch

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 04:34
CPC Classifications
G; G08; G08C; G08C19/00; G08C19/12; G08C19/14

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 121 words
A decoding logic receiver for an electronic control device comprising: first circuit means, responsive to a correct sequence of transmitted tones of selected frequencies, for producing an output pulse; second circuit means, responsive to either receipt of two or more simultaneously transmitted tones or receipt of tones transmitted in incorrect sequence, to provide a primary inhibit output pulse; third circuit means, responsive to the absence of a signal during selected time intervals, for producing a secondary inhibit output pulse; actuating means, responsive to receipt of an output pulse from said first circuit means, for producing an actuation output; and means responsive to either a primary inhibit output pulse or a secondary inhibit output pulse for preventing operation of said actuating means.
Claim 2
Dependent Claim 121 words
A decoding logic receiver for an electronic control device comprising: first circuit means, responsive to a correct sequence of transmitted tones of selected frequencies, for producing an output pulse; second circuit means, responsive to either receipt of two or more simultaneously transmitted tones or receipt of tones transmitted in incorrect sequence, to provide a primary inhibit output pulse; third circuit means, responsive to the absence of a signal during selected time intervals, for producing a secondary inhibit output pulse; actuating means, responsive to receipt of an output pulse from said first circuit means, for producing an actuation output; and means responsive to either a primary inhibit output pulse or a secondary inhibit output pulse for preventing operation of said actuating means.
Claim 3
Dependent Claim 31 words
A decoding logic receiver according to claim 1 wherein the first circuit means is responsive only to receipt of a series of three specifically spaced signals transmitted at three distinctive frequencies.
Claim 4
Dependent Claim 116 words
A decoding logic receiver according to claim 2 wherein said first circuit means comprises: (a) sensing means susceptible to signals on a plurality of distinctive frequencies; (b) amplifier means connected to said sensing means for amplifying signals received by said sensing means; band pass filter means comprising a plurality of devices for respectively passing only selected ones of said plurality of distinctive frequencies; demodulating means comprising a detector connected to each of said devices of said filter means; and (e) logic means comprising means connected to said demodulating means for recognition of proper signals in correct time spaces and for issuing an output pulse only when the proper signals are received in the correct time sequence.

References Cited (Backward Citations)

US3395390A Cited
US3699522A Cited
US3551889A Cited
US3495219A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1982-07-16 1983-01-15 1983-07-17 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1986-07-16 1987-01-15 1987-07-17 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1990-07-16 1991-01-15 1991-07-17 $7700.00 Window Closed / Lapsed

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