← Back to Patent Explorer
US4138690A Expired / Lapsed US ⏱️ 0.0 years remaining

Darlington circuit semiconductor device

Assignee: Toshiba Corp
•
Filing: 1977-05-10
•
Granted: 1979-02-06
•
Expires: 1997-05-10
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A semiconductor device comprises darlington-connected first and second transistors, a diode connected between the emitter of the first transistor and the base of the second transistor and a resistor connected in parallel to the diode -- all being formed in a single semiconductor body.

Inventors

  • 👤 Keiji Nawa
  • 👤 Masami Iwasaki

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 12:07
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/04; H03K17/041; H03K17/0412; H03K17/04126; H10; H10D; H10D84/00; H10D84/60; H10D84/641; H10D84/642

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 127 words
A Darlington circuit semiconductor device comprising a semiconductor body, first and second transistors darlington-connected and formed in said semiconductor body, diode means formed in said semiconductor body to permit, when said first and second transistors are switched off, a base current of said first transistor to flow in the reverse direction to enhance a switching speed of said first and second transistors, and resistor means formed in said semiconductor body, the collector and base of said first transistor being connected to the collector and emitter of said second transistor, respectively, said resistor means being connected in parallel to said diode means, and the anode and cathode of said diode means being connected to the base of said first transistor and the base of said second transistor, respectively.
Claim 2
Dependent Claim 127 words
A Darlington circuit semiconductor device comprising a semiconductor body, first and second transistors darlington-connected and formed in said semiconductor body, diode means formed in said semiconductor body to permit, when said first and second transistors are switched off, a base current of said first transistor to flow in the reverse direction to enhance a switching speed of said first and second transistors, and resistor means formed in said semiconductor body, the collector and base of said first transistor being connected to the collector and emitter of said second transistor, respectively, said resistor means being connected in parallel to said diode means, and the anode and cathode of said diode means being connected to the base of said first transistor and the base of said second transistor, respectively.
Claim 3
Dependent Claim 172 words
A Darlington circuit semiconductor device comprising a semiconductor body; a first layer of one conductivity type formed in said semiconductor body; a second layer of the opposite conductivity type formed in said semiconductor body and forming a PN junction jointly with said first layer; first, second and third regions of said one conductivity type being formed in said second layer, forming PN junctions jointly with said second layer and having exposed surfaces; a collector electrode provided on said first layer; an emitter electrode provided on the exposed surface of said first region; a first base electrode provided on the exposed surface of said second region; a second base electrode provided on said second layer and electrically connected to said first base electrode; a third base electrode provided on the exposed surface of said third region; a fourth base electrode provided on said second layer and electrically connected to said third base electrode; and a fifth base electrode provided on said second layer and electrically connected to said first and second base electrodes.
Claim 4
Dependent Claim 172 words
A Darlington circuit semiconductor device comprising a semiconductor body; a first layer of one conductivity type formed in said semiconductor body; a second layer of the opposite conductivity type formed in said semiconductor body and forming a PN junction jointly with said first layer; first, second and third regions of said one conductivity type being formed in said second layer, forming PN junctions jointly with said second layer and having exposed surfaces; a collector electrode provided on said first layer; an emitter electrode provided on the exposed surface of said first region; a first base electrode provided on the exposed surface of said second region; a second base electrode provided on said second layer and electrically connected to said first base electrode; a third base electrode provided on the exposed surface of said third region; a fourth base electrode provided on said second layer and electrically connected to said third base electrode; and a fifth base electrode provided on said second layer and electrically connected to said first and second base electrodes.
Claim 5
Dependent Claim 28 words
A Darlington circuit semiconductor device according to claim 2, wherein that portion of said second layer which lies between said fourth and fifth base electrodes functions as resistance.
Claim 6
Dependent Claim 26 words
A Darlington circuit semiconductor device according to claim 2, wherein said fifth base electrode is opposite to said second region with respect to said third region.
Claim 7
Dependent Claim 20 words
A Darlington circuit semiconductor device according to claim 4, wherein said fifth base electrode is located near said third region.
Claim 8
Dependent Claim 22 words
A Darlington circuit semiconductor device according to claim 4, wherein said third region is made thinner than said first and second regions.
Claim 9
Dependent Claim 25 words
A Darlington circuit semiconductor device according to claim 4, wherein said third region is made thin at the portion adjacent to said fifth base electrode.
Claim 10
Dependent Claim 35 words
A Darlington circuit semiconductor device according to claim 4, wherein those portions of said second layer and third region which lie between said third and fifth base electrodes are doped with a life time killer.
Claim 11
Dependent Claim 38 words
A Darlington circuit semiconductor device according to claim 4, wherein those portions of said first and second layers and said third region which lie between said third and fifth base electrodes are doped with a life time killer.
Claim 12
Dependent Claim 84 words
A Darlington circuit semiconductor device according to claim 2, wherein said first and third region sandwich said second region, said second base electrode is a portion of said first base electrode which extends toward said first region, said fourth base electrode is a portion of said third base electrode which extends toward said second region, and said fifth base electrode is opposite to said second region with respect to said third region and is electrically connected to said first base electrode though conductive means.
Claim 13
Dependent Claim 105 words
A Darlington circuit semiconductor device according to claim 2, wherein said fifth base electrode is located in the center of the device in the direction of depth, said third and fourth base electrodes surround said fifth base electrode in a ring form, said first and second base electrodes surround said third and fourth electrodes substantially in a ring form, said first electrode has on its outer periphery a plurality of projections spaced at equal distance, said emitter electrode surrounds said first and second base electrodes substantially in a ring form and has on its inner periphery a plurality of concaves which conform to said projections.
Claim 14
Dependent Claim 92 words
A Darlington circuit semiconductor device according to claim 2, wherein said first and second regions sandwich said third region, said second base electrode is a portion of said first base electrode which extends toward said third region, said fourth base electrode is opposite to said third region with respect to said second region and is electrically connected to said third base electrode through first conductive means, and said fifth base electrode is located between said first and third regions and is electrically connected to said first base electrode through second conductive means.

References Cited (Backward Citations)

US3453505A Cited
US3466467A Cited
US3596150A Cited
US3648060A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1982-02-05 1982-08-07 1983-02-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1986-02-05 1986-08-07 1987-02-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1990-02-05 1990-08-07 1991-02-06 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag