JFET switch circuit

Claim 1

A JFET-bipolar transistor analog signal switching circuit comprising: a switching JFET having its source and drain terminals coupled to a pair of analog signal switching terminals, said switching JFET acting as a relatively high impedance between said analog signal switching terminals when its gate capacitance is charged to a potential greater than its pitch off voltage rating and acting as a relatively low impedance between said analog signal switching terminals when its gate capacitance is discharged to a potential lower than its pinch off voltage rating; a first bipolar transistor having its collector electrode coupled to the gate electrode of said switching JFET and having its emitter electrode coupled to a terminal connectible to a source of potential that exceeds said pinch off voltage rating; a second bipolar transistor having its collector electrode coupled to the gate electrode of said switching JFET and having its emitter electrode coupled to a terminal connectible to a source of potential that is less than said pinch off voltage rating; a driver JFET connected as a source follower having its source coupled to the base of said second bipolar transistor and to a constant current source, the gate of said driver JFET being coupled to said gate of said switching JFET; means for supplying a first switching signal to said first bipolar transistor; and means for supplying a second switching signal, complementary to said first switching signal, to said constant current source whereby when said first bipolar transistor is on said switching JFET is off and when first bipolar is off said switching JFET, said second bipolar transistor, and said driver JFET are on.